| |
| 1992 | ||
|---|---|---|
| 6 | EE | S. Chowdhury, J. S. Barkatullah: Reliable sizing of power networks in VLSI circuits. Computer-Aided Design 24(6): 291-300 (1992) |
| 1991 | ||
| 5 | EE | J. S. Barkatullah, S. Chowdhury: A Transmission Line Simulator for GaAs Integrated Circuits. DAC 1991: 746-751 |
| 1990 | ||
| 4 | EE | S. Chowdhury, J. S. Barkatullah: Estimation of maximum currents in MOS IC logic circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 9(6): 642-654 (1990) |
| 1989 | ||
| 3 | EE | S. Chowdhury: Optimum Design of Reliable IC Power Networks Having General Graph Topologies. DAC 1989: 787-790 |
| 2 | EE | S. Chowdhury: Analytical approaches to the combinatorial optimization in linear placement problems. IEEE Trans. on CAD of Integrated Circuits and Systems 8(6): 630-639 (1989) |
| 1987 | ||
| 1 | EE | S. Chowdhury: An Automated Design of Minimum-Area IC Power/Ground Nets. DAC 1987: 223-229 |
| 1 | J. S. Barkatullah | [4] [5] [6] |