1994 | ||
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2 | EE | Shun-Lin Su, Charles H. Barry, Chi-Yuan Lo: A space-efficient short-finding algorithm [VLSI layouts]. IEEE Trans. on CAD of Integrated Circuits and Systems 13(8): 1065-1068 (1994) |
1987 | ||
1 | EE | Shun-Lin Su, Vasant B. Rao, Timothy N. Trick: HPEX: A Hierarchical Parasitic Circuit Extractor. DAC 1987: 566-569 |
1 | Charles H. Barry | [2] |
2 | Chi-Yuan Lo | [2] |
3 | Vasant B. Rao | [1] |
4 | Timothy N. Trick | [1] |