| |
| 1986 | ||
|---|---|---|
| 5 | J. Paul Roth: Minimization by the D Algorithm. IEEE Trans. Computers 35(5): 476-478 (1986) | |
| 1984 | ||
| 4 | J. Paul Roth, Vojin G. Oklobdzija, John F. Beetem: Test Generation for FET Switching Circuits. ITC 1984: 59-62 | |
| 3 | J. Paul Roth: VLSI Verification and Correction. VLSI Engineering 1984: 174-176 | |
| 1978 | ||
| 2 | J. Paul Roth: Programmed Logic Array Optimization. IEEE Trans. Computers 27(2): 174-176 (1978) | |
| 1977 | ||
| 1 | J. Paul Roth: Hardware Verification. IEEE Trans. Computers 26(12): 1292-1294 (1977) | |
| 1 | John F. Beetem | [4] |
| 2 | Vojin G. Oklobdzija | [4] |