Manuel Valencia

2008
13	EE	Angel Barriga Barrios, Carlos J. Jiménez, Manuel Valencia: Logic Synthesis. Wiley Encyclopedia of Computer Science and Engineering 2008
2007
12	EE	Javier Castro, Pilar Parra, Manuel Valencia, Antonio J. Acosta: Asymmetric clock driver for improved power and noise performances. ISCAS 2007: 893-896
2005
11	EE	Pilar Parra, Antonio J. Acosta, Raúl Jiménez, Manuel Valencia: Selective Clock-Gating for Low-Power Synchronous Counters. J. Low Power Electronics 1(1): 11-19 (2005)
2002
10	EE	C. Baena, Jorge Juan-Chico, Manuel J. Bellido, Paulino Ruiz-de-Clavijo, Carlos J. Jiménez, Manuel Valencia: Measurement of the Switching Activity of CMOS Digital Circuits at the Gate Level. PATMOS 2002: 353-362
9	EE	Pilar Parra, Antonio J. Acosta, Manuel Valencia: Selective Clock-Gating for Low Power/Low Noise Synchronous Counters 1. PATMOS 2002: 448-457
2001
8	EE	Paulino Ruiz-de-Clavijo, Jorge Juan-Chico, Manuel J. Bellido, Antonio J. Acosta, Manuel Valencia: HALOTIS: high accuracy LOgic TIming simulator with inertial and degradation delay model. DATE 2001: 467-471
7	EE	Manuel J. Bellido, Jorge Juan-Chico, Paulino Ruiz-de-Clavijo, Antonio J. Acosta, Manuel Valencia: Gate-level simulation of CMOS circuits using the IDDM model. ISCAS (5) 2001: 483-486
2000
6	EE	Jorge Juan-Chico, Manuel J. Bellido, Paulino Ruiz-de-Clavijo, Antonio J. Acosta, Manuel Valencia: Degradation Delay Model Extension to CMOS Gates. PATMOS 2000: 149-158
5	EE	Antonio J. Acosta, Raúl Jiménez, Jorge Juan-Chico, Manuel J. Bellido, Manuel Valencia: Influence of Clocking Strategies on the Design of Low Switching-Noise Digital and Mixed-Signal VLSI Circuits. PATMOS 2000: 316-326
1995
4	EE	Antonio J. Acosta, Manuel J. Bellido, Manuel Valencia, Angel Barriga Barrios, Raúl Jiménez, José L. Huertas: New CMOS VLSI linear self-timed architectures. ASYNC 1995: 14-23
3		Manuel Valencia, Manuel J. Bellido, José L. Huertas, Antonio J. Acosta, Santiago Sánchez-Solano: Modular Asynchronous Arbiter Insensitive to Metastability. IEEE Trans. Computers 44(12): 1456-1461 (1995)
1993
2		Manuel J. Bellido, Manuel Valencia, Antonio J. Acosta, Angel Barriga Barrios, José Luis Huertas, Rafael Domínguez-Castro: A New Faster Method for Calculating the Resolution Coefficient of CMOS Latches: Design of an Optimum Latch. ISCAS 1993: 2019-2022
1986
1		J. Calvo, J. I. Acha, Manuel Valencia: Asynchronous Modular Arbiter. IEEE Trans. Computers 35(1): 67-70 (1986)

Coauthor Index

1	J. I. Acha	[1]
2	Antonio J. Acosta	[2] [3] [4] [5] [6] [7] [8] [9] [11] [12]
3	C. Baena	[10]
4	Angel Barriga Barrios	[2] [4] [13]
5	J. Calvo	[1]
6	Javier Castro	[12]
7	Manuel Jesús Bellido Díaz (Manuel J. Bellido)	[2] [3] [4] [5] [6] [7] [8] [10]
8	Rafael Domínguez-Castro	[2]
9	José Luis Huertas (José L. Huertas)	[2] [3] [4]
10	Carlos J. Jiménez	[10] [13]
11	Raúl Jiménez	[4] [5] [11]
12	Jorge Juan-Chico	[5] [6] [7] [8] [10]
13	Pilar Parra	[9] [11] [12]
14	Paulino Ruiz-de-Clavijo	[6] [7] [8] [10]
15	Santiago Sánchez-Solano	[3]