2008 |
38 | EE | Aditya Thakur,
R. Govindarajan:
Comprehensive path-sensitive data-flow analysis.
CGO 2008: 55-63 |
37 | EE | R. Manikantan,
R. Govindarajan:
Focused prefetching: performance oriented prefetching based on commit stalls.
ICS 2008: 339-348 |
36 | EE | Sudhakar Surendran,
Rubin A. Parekhji,
R. Govindarajan:
A systematic approach to synthesis of verification test-suites for modular SoC designs.
SoCC 2008: 91-96 |
35 | EE | T. S. Rajesh Kumar,
C. P. Ravikumar,
R. Govindarajan:
Memory Architecture Exploration Framework for Cache Based Embedded SOC.
VLSI Design 2008: 553-559 |
34 | EE | V. Santhosh Kumar,
R. Nanjundiah,
Matthew J. Thazhuthaveetil,
R. Govindarajan:
Impact of message compression on the scalability of an atmospheric modeling application on clusters.
Parallel Computing 34(1): 1-16 (2008) |
2007 |
33 | EE | T. S. Rajesh Kumar,
C. P. Ravikumar,
R. Govindarajan:
MODLEX: A Multi Objective Data Layout EXploration Framework for Embedded Systems-on-Chip.
ASP-DAC 2007: 492-497 |
32 | EE | Santosh G. Nagarakatte,
R. Govindarajan:
Register Allocation and Optimal Spill Code Scheduling in Software Pipelined Loops Using 0-1 Integer Linear Programming Formulation.
CC 2007: 126-140 |
31 | EE | K. Shyam,
R. Govindarajan:
An Array Allocation Scheme for Energy Reduction in Partitioned Memory Architectures.
CC 2007: 32-47 |
30 | EE | K. Shyam,
R. Govindarajan:
Compiler-Directed Dynamic Voltage Scaling Using Program Phases.
HiPC 2007: 233-244 |
29 | EE | S. Govind,
R. Govindarajan,
Joy Kuri:
Packet Reordering in Network Processors.
IPDPS 2007: 1-10 |
28 | EE | Kaushik Rajan,
R. Govindarajan,
Bharadwaj Amrutur:
Dynamic Cache Placement with Two-level Mapping to Reduce Conflict Misses.
PACT 2007: 422 |
27 | EE | Rajesh Vivekanandham,
R. Govindarajan:
A Scalable Low Power Store Queue for Large InstructionWindow Processors.
PACT 2007: 430 |
26 | EE | Girish B. C.,
R. Govindarajan:
A Petri Net Model for Evaluating Packet Buffering Strategies in a Network Processor.
QEST 2007: 19-30 |
25 | EE | T. S. Rajesh Kumar,
C. P. Ravikumar,
R. Govindarajan:
MAX: A Multi Objective Memory Architecture eXploration Framework for Embedded Systems-on-Chip.
VLSI Design 2007: 527-533 |
24 | EE | Rajani Pai,
R. Govindarajan:
FEADS: A Framework for Exploring the Application Design Space on Network Processors.
International Journal of Parallel Programming 35(1): 1-31 (2007) |
2006 |
23 | EE | Rajesh Vivekanandham,
Bharadwaj Amrutur,
R. Govindarajan:
A scalable low power issue queue for large instruction window processors.
ICS 2006: 167-176 |
22 | EE | V. Santhosh Kumar,
Matthew J. Thazhuthaveetil,
R. Govindarajan:
Exploiting programmable network interfaces for parallel query execution in workstation clusters.
IPDPS 2006 |
21 | EE | Kaushik Rajan,
R. Govindarajan:
Two-level mapping based cache index selection for packet forwarding engines.
PACT 2006: 212-221 |
20 | EE | Subash G. Chandar,
Mahesh Mehendale,
R. Govindarajan:
Area and Power Reduction of Embedded DSP Systems using Instruction Compression and Re-configurable Encoding.
VLSI Signal Processing 44(3): 245-267 (2006) |
2005 |
19 | EE | V. Santhosh Kumar,
Matthew J. Thazhuthaveetil,
R. Govindarajan:
Offloading Bloom Filter Operations to Network Processor for Parallel Query Processing in Cluster of Workstations.
HiPC 2005: 170-179 |
18 | EE | Kaushik Rajan,
R. Govindarajan:
A heterogeneously segmented cache architecture for a packet forwarding engine.
ICS 2005: 71-80 |
17 | EE | S. Govind,
R. Govindarajan:
Performance Modeling and Architecture Exploration of Network Processors.
QEST 2005: 189-198 |
2004 |
16 | EE | N. P. Manoj,
K. V. Manjunath,
R. Govindarajan:
CAS-DSM: A Compiler Assisted Software Distributed Shared Memory.
International Journal of Parallel Programming 32(2): 77-122 (2004) |
15 | EE | Manjunath Kudlur,
R. Govindarajan:
Performance analysis of methods that overcome false sharing effects in software DSMs.
J. Parallel Distrib. Comput. 64(8): 887-907 (2004) |
2003 |
14 | EE | A. Radhika Sarma,
R. Govindarajan:
An Efficient Web Cache Replacement Policy.
HiPC 2003: 12-22 |
13 | EE | R. Achutharaman,
R. Govindarajan,
G. Hariprakash,
Amos Omondi:
Exploiting Java-ILP on a Simultaneous Multi-Trace Instruction Issue (SMTI) Processor.
IPDPS 2003: 76 |
12 | EE | V. V. N. S. Sarvani,
R. Govindarajan:
Unified Instruction Reordering and Algebraic Transformations for Minimum Cost Offset Assignment.
SCOPES 2003: 270-284 |
11 | EE | T. S. Rajesh Kumar,
R. Govindarajan,
C. P. Ravi Kumar:
Optimal Code and Data Layout in Embedded Systems.
VLSI Design 2003: 573-578 |
2002 |
10 | EE | R. Vinodh Kumar,
B. Lakshmi Narayanan,
R. Govindarajan:
Dynamic Path Profile Aided Recompilation in a JAVA Just-In-Time Compiler.
HiPC 2002: 495-505 |
2001 |
9 | EE | K. V. Manjunath,
R. Govindarajan:
Hidden Costs in Avoiding False Sharing in Software DSMs.
HiPC 2001: 294-306 |
8 | EE | Subash G. Chandar,
Mahesh Mehendale,
R. Govindarajan:
Area and Power Reduction of Embedded DSP Systems using Instruction Compression and Re-Configurable Encoding.
ICCAD 2001: 631-634 |
2000 |
7 | | N. Sreraman,
R. Govindarajan:
A Vectorizing Compiler for Multimedia Extensions.
International Journal of Parallel Programming 28(4): 363-400 (2000) |
1999 |
6 | EE | Madhavi Gopal Valluri,
R. Govindarajan:
Evaluating Register Allocation and Instruction Scheduling Techniques in Out-Of-Order Issue Processors.
IEEE PACT 1999: 78-83 |
1997 |
5 | EE | S. Ramesh,
R. Lakshmi,
R. Govindarajan:
Distributed Shared Memory on IBM SP2.
ICPADS 1997: 338-345 |
1993 |
4 | EE | R. Govindarajan:
Exception Handlers in Functional Programming Languages.
IEEE Trans. Software Eng. 19(8): 826-834 (1993) |
1991 |
3 | | R. Govindarajan,
Sheng Yu:
Data Flow Implementation of Generalized Guarded Commands.
PARLE (1) 1991: 372-389 |
1990 |
2 | | R. Govindarajan,
Lalit M. Patnaik:
Lenient Execution and Concurrent Execution of Re-Entrant Routines: Efficient Implementation in Data Flow Systems.
Comput. J. 33(2): 185-187 (1990) |
1986 |
1 | | Lalit M. Patnaik,
R. Govindarajan,
N. S. Ramadoss:
Design and Performance Evaluation of EXMAN: An EXtended MANchester Data Flow Computer.
IEEE Trans. Computers 35(3): 229-244 (1986) |