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2002 | ||
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6 | EE | Dave Stang, Ramaswami Dandapani: An Implementation of IEEE 1149.1 to Avoid Timing Violations and Other Practical In-Compliance Improvements. ITC 2002: 746-754 |
1995 | ||
5 | David J. Cheek, Ramaswami Dandapani: Integration of IEEE Std. 1149.1 and Mixed-Signal Test Architectures. ITC 1995: 569-576 | |
1994 | ||
4 | Yunsheng Lu, Weiwei Mao, Ramaswami Dandapani, Ravi K. Gulati: Structure and Metrology for a Single-wire Analog. ITC 1994: 919-928 | |
1986 | ||
3 | Kewal K. Saluja, Ramaswami Dandapani: An Alternative to Scan Design Methods for Sequential Machines. IEEE Trans. Computers 35(4): 384-388 (1986) | |
2 | Kewal K. Saluja, Ramaswami Dandapani: Testable Design of Single-Output Sequential Machines Using Checking Experiments. IEEE Trans. Computers 35(7): 658-662 (1986) | |
1984 | ||
1 | Ramaswami Dandapani, Janak H. Patel, Jacob A. Abraham: Design of Test Pattern Generators for Built-In Test. ITC 1984: 315-319 |
1 | Jacob A. Abraham | [1] |
2 | David J. Cheek | [5] |
3 | Ravi K. Gulati | [4] |
4 | Yunsheng Lu | [4] |
5 | Weiwei Mao | [4] |
6 | Janak H. Patel | [1] |
7 | Kewal K. Saluja | [2] [3] |
8 | Dave Stang | [6] |