2007 |
32 | EE | Crescenzo D'Alessandro,
Andrey Mokhov,
Alexandre V. Bystrov,
Alexandre Yakovlev:
Delay/Phase Regeneration Circuits.
ASYNC 2007: 105-116 |
31 | EE | Valery A. Nepomniaschy,
Gennady I. Alekseev,
Victor S. Argirov,
Dmitri M. Beloglazov,
Alexandre V. Bystrov,
Eugene A. Chetvertakov,
Tatiana G. Churina,
Sergey P. Mylnikov,
Ruslan M. Novikov:
Application of Modified Coloured Petri Nets to Modeling and Verification of SDL Specified Communication Protocols.
CSR 2007: 303-314 |
30 | EE | K. T. Gardiner,
Alexandre Yakovlev,
Alexandre V. Bystrov:
A C-element Latch Scheme with Increased Transient Fault Tolerance for Asynchronous Circuits.
IOLTS 2007: 223-230 |
29 | EE | Delong Shang,
Alexandre Yakovlev,
Albert Koelmans,
Danil Sokolov,
Alexandre V. Bystrov:
Registers for Phase Difference Based Logic.
IEEE Trans. VLSI Syst. 15(6): 720-724 (2007) |
28 | EE | Danil Sokolov,
Alexandre V. Bystrov,
Alexandre Yakovlev:
Direct Mapping of Low-Latency Asynchronous Controllers From STGs.
IEEE Trans. on CAD of Integrated Circuits and Systems 26(6): 993-1009 (2007) |
2006 |
27 | EE | Crescenzo D'Alessandro,
Delong Shang,
Alexandre V. Bystrov,
Alexandre Yakovlev,
Oleg V. Maevsky:
Multiple-Rail Phase-Encoding for NoC.
ASYNC 2006: 107-116 |
26 | EE | Delong Shang,
Alexandre Yakovlev,
Frank P. Burns,
Fei Xia,
Alexandre V. Bystrov:
Low-Cost Online Testing of Asynchronous Handshakes.
European Test Symposium 2006: 225-232 |
25 | EE | Deepali Koppad,
Danil Sokolov,
Alexandre V. Bystrov,
Alexandre Yakovlev:
Online Testing by Protocol Decomposition.
IOLTS 2006: 263-268 |
2005 |
24 | EE | Delong Shang,
Alexandre V. Bystrov,
Alexandre Yakovlev,
Deepali Koppad:
On-Line Testing of Globally Asynchronous Circuits.
IOLTS 2005: 135-140 |
23 | EE | Julian Murphy,
Alexandre V. Bystrov,
Alexandre Yakovlev:
Power-Balanced Self Checking Circuits for Cryptographic Chips.
IOLTS 2005: 157-162 |
22 | EE | Crescenzo D'Alessandro,
Delong Shang,
Alexandre V. Bystrov,
Alexandre Yakovlev:
PSK Signalling on NoC Buses.
PATMOS 2005: 286-296 |
21 | EE | Deepali Koppad,
Alexandre V. Bystrov,
Alexandre Yakovlev:
Off-Line Testing of Asynchronous Circuits.
VLSI Design 2005: 730-735 |
20 | EE | Danil Sokolov,
Julian Murphy,
Alexandre V. Bystrov,
Alexandre Yakovlev:
Design and Analysis of Dual-Rail Circuits for Security Applications.
IEEE Trans. Computers 54(4): 449-460 (2005) |
2004 |
19 | EE | Danil Sokolov,
Julian Murphy,
Alexandre V. Bystrov,
Alexandre Yakovlev:
Improving the Security of Dual-Rail Circuits.
CHES 2004: 282-297 |
18 | EE | Delong Shang,
Frank P. Burns,
Alexandre V. Bystrov,
Albert Koelmans,
Danil Sokolov,
Alexandre Yakovlev:
A Low and Balanced Power Implementation of the AES Security Mechanism Using Self-Timed Circuits.
PATMOS 2004: 471-480 |
17 | EE | Alexandre Yakovlev,
Stephen B. Furber,
René Krenz,
Alexandre V. Bystrov:
Design and Analysis of a Self-Timed Duplex Communication System.
IEEE Trans. Computers 53(7): 798-814 (2004) |
2003 |
16 | EE | Alexandre V. Bystrov,
Danil Sokolov,
Alexandre Yakovlev:
Low-Latency Contro Structures with Slack.
ASYNC 2003: 164-173 |
15 | EE | Agnes Madalinski,
Alexandre V. Bystrov,
Victor Khomenko,
Alexandre Yakovlev:
Visualization and Resolution of Coding Conflicts in Asynchronous Circuit Design.
DATE 2003: 10926-10931 |
14 | EE | Danil Sokolov,
Alexandre V. Bystrov,
Alexandre Yakovlev:
STG Optimisation in the Direct Mapping of Asynchronous Circuits .
DATE 2003: 10932-10939 |
13 | EE | D. J. Kinniment,
Oleh V. Maevsky,
Alexandre V. Bystrov,
Gordon Russell,
Alexandre Yakovlev:
On-chip structures for timing measurement and test.
Microprocessors and Microsystems 27(9): 473-483 (2003) |
2002 |
12 | EE | Alexandre V. Bystrov,
Alexandre Yakovlev:
Asynchronous Circuit Synthesis by Direct Mapping: Interfacing to Environment.
ASYNC 2002: 127-136 |
11 | EE | D. J. Kinniment,
Oleh V. Maevsky,
Gordon Russell,
Alexandre Yakovlev,
Alexandre V. Bystrov:
On-Chip Structures for Timing Measurements and Test.
ASYNC 2002: 190- |
10 | EE | Alexandre V. Bystrov,
Maciej Koutny,
Alexandre Yakovlev:
Visualization of Partial Order Models in VLSI Design Flow.
DATE 2002: 1089 |
9 | EE | Oleh V. Maevsky,
D. J. Kinniment,
Alexandre Yakovlev,
Alexandre V. Bystrov:
Analysis of the oscillation problem in tri-flops.
ISCAS (1) 2002: 381-384 |
8 | | Agnes Madalinski,
Alexandre V. Bystrov,
Alexandre Yakovlev:
Visualization of Coding Conflicts in Asynchronous Circuit Design.
IWLS 2002: 155-160 |
7 | | Alexandre V. Bystrov,
Alexandre Yakovlev:
Synthesis of Asynchronous Circuits with Predictable Latency.
IWLS 2002: 239-243 |
2001 |
6 | EE | V. A. Nepomniaschy,
Gennady I. Alekseev,
Alexandre V. Bystrov,
Sergey P. Mylnikov,
E. V. Okunishnikova,
P. A. Chubarev,
Tatiana G. Churina:
Verification of Estelle-Specified Communication Protocols Using High-Level Petri Nets.
Programming and Computer Software 27(2): 58-68 (2001) |
2000 |
5 | EE | Alexandre V. Bystrov,
D. J. Kinniment,
Alexandre Yakovlev:
Priority Arbiters.
ASYNC 2000: 128-137 |
4 | EE | Fei Xia,
Alexandre Yakovlev,
Delong Shang,
Alexandre V. Bystrov,
Albert Koelmans,
D. J. Kinniment:
Asynchronous Communication Mechanisms Using Self-Timed Circuits.
ASYNC 2000: 150- |
3 | EE | Nikolai Starodoubtsev,
Alexandre V. Bystrov,
Alexandre Yakovlev:
Semi-modular Latch Chains for Asynchronous Circuit Design.
PATMOS 2000: 168-177 |
1999 |
2 | EE | Alexandre V. Bystrov,
I. B. Verbistskaite:
Implementing Model Checking and Equivalence Checking for Time Petri Nets by the RT-MEC Tool.
PaCT 1999: 194-199 |
1995 |
1 | | V. A. Nepomniaschy,
Gennady I. Alekseev,
Alexandre V. Bystrov,
Tatiana G. Churina,
Sergey P. Mylnikov,
E. V. Okunishnikova:
Petri Net Modelling of Estelle-specified Communication Protocols.
PaCT 1995: 94-108 |