2007 |
23 | EE | Nikolaos Minas,
David Kinniment,
Keith Heron,
Gordon Russell:
A High Resolution Flash Time-to-Digital Converter Taking Into Account Process Variability.
ASYNC 2007: 163-174 |
22 | EE | Crescenzo D'Alessandro,
Nikolaos Minas,
Keith Heron,
David Kinniment,
Alexandre Yakovlev:
NoC Communication Strategies Using Time-to-Digital Conversion.
NOCS 2007: 65-74 |
21 | EE | David Kinniment,
Charles E. Dike,
Keith Heron,
Gordon Russell,
Alexandre Yakovlev:
Measuring Deep Metastability and Its Effect on Synchronizer Performance.
IEEE Trans. VLSI Syst. 15(9): 1028-1039 (2007) |
2006 |
20 | EE | David Kinniment,
Keith Heron,
Gordon Russell:
Measuring Deep Metastability.
ASYNC 2006: 2-11 |
19 | EE | Jun Zhou,
David Kinniment,
Gordon Russell,
Alexandre Yakovlev:
A Robust Synchronizer.
ISVLSI 2006: 442-443 |
2004 |
18 | EE | M. A. Abas,
Gordon Russell,
D. J. Kinniment:
Design of Sub-10-Picoseconds On-Chip Time Measurement Circuit.
DATE 2004: 804-809 |
17 | EE | D. J. Kinniment,
Alexandre Yakovlev:
Low Latency Synchronization Through Speculation.
PATMOS 2004: 278-288 |
2003 |
16 | EE | D. J. Kinniment,
Oleh V. Maevsky,
Alexandre V. Bystrov,
Gordon Russell,
Alexandre Yakovlev:
On-chip structures for timing measurement and test.
Microprocessors and Microsystems 27(9): 473-483 (2003) |
2002 |
15 | EE | D. J. Kinniment,
Oleh V. Maevsky,
Gordon Russell,
Alexandre Yakovlev,
Alexandre V. Bystrov:
On-Chip Structures for Timing Measurements and Test.
ASYNC 2002: 190- |
14 | EE | Oleh V. Maevsky,
D. J. Kinniment,
Alexandre Yakovlev,
Alexandre V. Bystrov:
Analysis of the oscillation problem in tri-flops.
ISCAS (1) 2002: 381-384 |
2000 |
13 | EE | Alexandre V. Bystrov,
D. J. Kinniment,
Alexandre Yakovlev:
Priority Arbiters.
ASYNC 2000: 128-137 |
12 | EE | Fei Xia,
Alexandre Yakovlev,
Delong Shang,
Alexandre V. Bystrov,
Albert Koelmans,
D. J. Kinniment:
Asynchronous Communication Mechanisms Using Self-Timed Circuits.
ASYNC 2000: 150- |
11 | EE | David Kinniment,
Alexandre Yakovlev,
B. Gao:
Synchronous and asynchronous A-D conversion.
IEEE Trans. VLSI Syst. 8(2): 217-220 (2000) |
1999 |
10 | EE | I. D. Bates,
E. Graeme Chester,
D. J. Kinniment:
A statechart based HW/SW codesign system.
CODES 1999: 162-166 |
1998 |
9 | EE | D. J. Kinniment,
Alexandre Yakovlev,
Fei Xia,
B. Gao:
Towards Asynchronous A-D Conversion.
ASYNC 1998: 206-215 |
1996 |
8 | EE | J. N. Coleman,
Frank P. Burns,
D. J. Kinniment,
T. J. Butler,
Albert Koelmans:
A self-taught computer engineering course.
ACSE 1996: 7-12 |
7 | EE | D. J. Kinniment:
An evaluation of asynchronous addition.
IEEE Trans. VLSI Syst. 4(1): 137-140 (1996) |
6 | EE | Alexandre Yakovlev,
Albert Koelmans,
Alexei L. Semenov,
D. J. Kinniment:
Modelling, analysis and synthesis of asynchronous control circuits using Petri nets.
Integration 21(3): 143-170 (1996) |
1992 |
5 | | D. J. Kinniment,
Albert Koelmans:
Modelling and Verification of Timing Conditions with the Boyer Moore Prover.
TPCD 1992: 111-127 |
4 | | A. P. Robson,
D. J. Kinniment:
SIMSTRICT: A Behavioural Simulator for Use with the STRICT Hardware Description Language (Short Note).
Comput. J. 35(6): 651-654 (1992) |
1978 |
3 | | A. K. Burston,
D. J. Kinniment,
Hilary J. Kahn:
A Design Language for Asynchronous Logic.
Comput. J. 21(4): 347-354 (1978) |
1971 |
2 | | Simon H. Lavington,
D. J. Kinniment,
Alan E. Knowles:
An Experimental Paging Unit.
Comput. J. 14(1): 55-60 (1971) |
1968 |
1 | | David Aspinall II,
D. J. Kinniment,
David B. G. Edwards:
Associative memories in large computer systems and An integrated associateve memory matrix.
IFIP Congress (2) 1968: 796-800 |