| 2002 |
|---|
| 3 | EE | Jin-Fu Li,
Hsin-Jung Huang,
Jeng-Bin Chen,
Chih-Pin Su,
Cheng-Wen Wu,
Chuang Cheng,
Shao-I Chen,
Chi-Yi Hwang,
Hsiao-Ping Lin:
A Hierarchical Test Scheme for System-On-Chip Designs.
DATE 2002: 486-490 |
| 2 | EE | Jin-Fu Li,
Hsin-Jung Huang,
Jeng-Bin Chen,
Chih-Pin Su,
Cheng-Wen Wu,
Chuang Cheng,
Shao-I Chen,
Chi-Yi Hwang,
Hsiao-Ping Lin:
A Hierarchical Test Methodology for Systems on Chip.
IEEE Micro 22(5): 69-81 (2002) |
| 2000 |
|---|
| 1 | EE | Chuang Cheng,
Chih-Tsun Huang,
Jing-Reng Huang,
Cheng-Wen Wu,
Chen-Jong Wey,
Ming-Chang Tsai:
BRAINS: A BIST Compiler for Embedded Memories.
DFT 2000: 299- |
