| |
| 2003 | ||
|---|---|---|
| 3 | EE | Tianxu Zhao, Xuchao Duan, Yue Hao, Peijun Ma: Reliability Estimation Model of ICs Interconnect Based on Uniform Distribution of Defects on a Chip. DFT 2003: 11-17 |
| 2001 | ||
| 2 | EE | Tianxu Zhao, Yue Hao, Peijun Ma, Taifeng Chen: Relation between Reliability and Yield of IC's Based on Discrete Defect Distribution Model. DFT 2001: 48- |
| 2000 | ||
| 1 | EE | Tianxu Zhao, Yue Hao, Yong-Chang Jiao: VLSI Yield Optimization Based on the Sub-Processing-Element Level Redundancy. DFT 2000: 41-46 |
| 1 | Taifeng Chen | [2] |
| 2 | Xuchao Duan | [3] |
| 3 | Yue Hao | [1] [2] [3] |
| 4 | Yong-Chang Jiao | [1] |
| 5 | Peijun Ma | [2] [3] |