Parag K. Lala

2008
43		Parag K. Lala: On FPGA Design with Self-checking and Fault Tolerance Capability. ERSA 2008: 29-34
2007
42	EE	Jia Di, Parag K. Lala: Cellular Array-based Delay-insensitive Asynchronous Circuits Design and Test for Nanocomputing Systems. J. Electronic Testing 23(2-3): 175-192 (2007)
2006
41	EE	Parag K. Lala, B. Kiran Kumar, James Patrick Parkerson: On self-healing digital system design. Microelectronics Journal 37(4): 353-362 (2006)
2005
40	EE	D. P. Vasudevan, Parag K. Lala: A Technique for Modular Design of Self-Checking Carry-Select Adder. DFT 2005: 325-333
39	EE	Jia Di, Parag K. Lala, D. P. Vasudevan: On the Effect of Stuck-at Faults on Delay-insensitive Nanoscale Circuits. DFT 2005: 371-379
38	EE	C. K. Tang, Parag K. Lala, James Patrick Parkerson: A Technique for Designing Totally Self-Checking Domino Logic Circuits. ISQED 2005: 128-132
37	EE	D. P. Vasudevan, Parag K. Lala, James Patrick Parkerson: CMOS Realization of Online Testable Reversible Logic Gates. ISVLSI 2005: 309-310
2004
36	EE	D. P. Vasudevan, Parag K. Lala, James Patrick Parkerson: A Novel Approach for On-line Testable Reversible Logic Circuit Desig. Asian Test Symposium 2004: 325-330
35		D. P. Vasudevan, James Patrick Parkerson, Parag K. Lala: Logic implementation using a reversible gate. Circuits, Signals, and Systems 2004: 452-456
34	EE	D. P. Vasudevan, Parag K. Lala, James Patrick Parkerson: Online Testable Reversible Logic Circuit Design using NAND Blocks. DFT 2004: 324-331
33		D. P. Vasudevan, Parag K. Lala: A New Reversible Logic Gate and its Applications. ESA/VLSI 2004: 480-484
2003
32	EE	Parag K. Lala: A Single Error Correcting and Double Error Detecting Coding Scheme for Computer Memory Systems. DFT 2003: 235-241
31	EE	Parag K. Lala, B. Kiran Kumar: An FPGA architecture with built-in error correction capability. FPGA 2003: 245
30	EE	S. R. Seward, Parag K. Lala: Fault Injection in Digital Logic Circuits at the VHDL Level. IOLTS 2003: 161
29	EE	Whitney J. Townsend, Jacob A. Abraham, Parag K. Lala: On-Line Error Detecting Constant Delay Adder. IOLTS 2003: 17-
28	EE	S. R. Seward, Parag K. Lala: Fault Injection for Verifying Testability at the VHDL Level. ITC 2003: 131-137
27	EE	B. Kiran Kumar, Parag K. Lala: On-line Detection of Faults in Carry-Select Adders. ITC 2003: 912-918
26	EE	Parag K. Lala, B. Kiran Kumar: An Architecture for Self-Healing Digital Systems. J. Electronic Testing 19(5): 523-535 (2003)
2002
25	EE	Parag K. Lala, K. K. Bondali: On Biologically-Inspired Design of Fault-Tolerant Digital Systems. DELTA 2002: 287-290
24	EE	Parag K. Lala, B. Kiran Kumar: An Architecture for Self-Healing Digital Systems. IOLTW 2002: 3-7
23	EE	Parag K. Lala, B. Kiran Kumar: Human Immune System Inspired Architecture for Self-Healing Digital Systems. ISQED 2002: 292-297
22		Whitney J. Townsend, Mitchell A. Thornton, Parag K. Lala: On-line Error Detection in a Carry-free Adder. IWLS 2002: 251-254
2001
21	EE	Parag K. Lala, Alvernon Walker: A Unified Scheme for Designing Testable State Machines. Asian Test Symposium 2001: 273-278
20	EE	Parag K. Lala, Alvernon Walker: On-Line Error Detectable Carry-Free Adder Design. DFT 2001: 66-71
19	EE	Parag K. Lala, Mark G. Karpovsky: An Approach for Designing On-Line Testable State Machines. IOLTW 2001: 135
2000
18	EE	Parag K. Lala, Alvernon Walker: An On-Line Reconfigurable FPGA Architecture. DFT 2000: 275-
17	EE	Jong O. Kim, Parag K. Lala, Young Gun Kim, Heung-Soo Kim: Fault Analysis of the Multiple Valued Logic Using Spectral Method. ISMVL 2000: 59-
16	EE	Alvernon Walker, Parag K. Lala: A Transition Based BIST Approach for Passive Analog Circuits. ISQED 2000: 347-354
1999
15	EE	Parag K. Lala, Anup Singh, Alvernon Walker: A CMOS-Based Logic Cell for the Implementation of Self-Checking FPGAs. DFT 1999: 238-246
14	EE	Parag K. Lala, A. L. Burress: Self-Checking Logic Design for LUT-Based FPGAs. FPGA 1999: 253
13	EE	Parag K. Lala, A. L. Burress: A technique for designing self-checking logic for FPGAs. ISCAS (1) 1999: 94-96
1997
12	EE	Alvernon Walker, Algernon P. Henry, Parag K. Lala: An approach for detecting bridging faults in CMOS domino logic circuits using dynamic power supply current monitoring. DFT 1997: 272-280
11		A. L. Burress, Parag K. Lala: On-Line Testable Logic Desgin for FPGA Implementation. ITC 1997: 471-478
1996
10		K. Lai, Parag K. Lala: Multiple Fault Detection in Fan-Out Free Circuits Using Minimal Single Fault Test Set. IEEE Trans. Computers 45(6): 763-765 (1996)
9	EE	D. A. Pierce, Parag K. Lala: Modular implementation of efficient self-checking checkers for the Berger code. J. Electronic Testing 9(3): 279-294 (1996)
1995
8	EE	Fadi Y. Busaba, Parag K. Lala: A graph coloring based approach for self-checking logic circuit design. Asian Test Symposium 1995: 327-
1994
7		J. Q. Wang, Parag K. Lala: Partially Strongly Fault Secure and Partially Strongly Code Disjoint I-out-of-3 Code Checker. IEEE Trans. Computers 43(10): 1238-1240 (1994)
6	EE	Fadi Y. Busaba, Parag K. Lala: Self-checking combinational circuit design for single and unidirectional multibit error. J. Electronic Testing 5(1): 19-28 (1994)
1992
5	EE	Alvernon Walker, Winser E. Alexander, Parag K. Lala: Fault Diagnosis in Analog Circuits Using Element Modulation. IEEE Design & Test of Computers 9(1): 19-29 (1992)
4		D. L. Tao, Carlos R. P. Hartmann, Parag K. Lala: A General Technique for Designing Totally Self-Checking Checker for 1-out-of-N Code with Minimum Gate Delay. IEEE Trans. Computers 41(7): 881-886 (1992)
1991
3		D. L. Tao, Carlos R. P. Hartmann, Parag K. Lala: A Note on t-EC/d-UED Codes. IEEE Trans. Computers 40(5): 660-663 (1991)
1986
2		D. L. Tao, Carlos R. P. Hartmann, Parag K. Lala: A Concurrent Testing Strategy for PLAs. ITC 1986: 705-709
1		Parag K. Lala: On Built-In Testing of VLSI Chips. ITC 1986: 719-721

Coauthor Index

1	Jacob A. Abraham	[29]
2	Winser E. Alexander	[5]
3	K. K. Bondali	[25]
4	A. L. Burress	[11] [13] [14]
5	Fadi Y. Busaba	[6] [8]
6	Jia Di	[39] [42]
7	Carlos R. P. Hartmann	[2] [3] [4]
8	Algernon P. Henry	[12]
9	Mark G. Karpovsky	[19]
10	Heung-Soo Kim	[17]
11	Jong O. Kim	[17]
12	Young Gun Kim	[17]
13	B. Kiran Kumar	[23] [24] [26] [27] [31] [41]
14	K. Lai	[10]
15	James Patrick Parkerson	[34] [35] [36] [37] [38] [41]
16	D. A. Pierce	[9]
17	S. R. Seward	[28] [30]
18	Anup Singh	[15]
19	C. K. Tang	[38]
20	D. L. Tao	[2] [3] [4]
21	Mitchell A. Thornton (Mitchell Aaron Thornton)	[22]
22	Whitney J. Townsend	[22] [29]
23	D. P. Vasudevan	[33] [34] [35] [36] [37] [39] [40]
24	Alvernon Walker	[5] [12] [15] [16] [18] [20] [21]
25	J. Q. Wang	[7]

Colors in the list of coauthors