2000 |
11 | EE | Michael Münch,
Norbert Wehn,
Bernd Wurth,
Renu Mehra,
Jim Sproch:
Automating RT-Level Operand Isolation to Minimize Power Consumption in Datapaths.
DATE 2000: 624- |
1999 |
10 | EE | Bernd Wurth,
Ulf Schlichtmann,
Klaus Eckl,
Kurt Antreich:
Functional multiple-output decomposition with application to technology mapping for lookup table-based FPGAs.
ACM Trans. Design Autom. Electr. Syst. 4(3): 313-350 (1999) |
1998 |
9 | EE | Christian Legl,
Bernd Wurth,
Klaus Eckl:
Computing support-minimal subfunctions during functional decomposition.
IEEE Trans. VLSI Syst. 6(3): 354-363 (1998) |
1996 |
8 | EE | Christian Legl,
Bernd Wurth,
Klaus Eckl:
A Boolean Approach to Performance-Directed Technology Mapping for LUT-Based FPGA Designs.
DAC 1996: 730-733 |
7 | EE | Bernhard Rohfleisch,
Alfred Kölbl,
Bernd Wurth:
Reducing Power Dissipation after Technology Mapping by Structural Transformations.
DAC 1996: 789-794 |
6 | | Christian Legl,
Klaus Eckl,
Bernd Wurth:
Performance-Directed Technology-Mapping for LUT-Based FPGAs - What Role Do Decomposition and Covering Play?
FPL 1996: 14-23 |
5 | EE | Peter H. Schneider,
Ulf Schlichtmann,
Bernd Wurth:
Fast Power Estimation of Large Circuits.
IEEE Design & Test of Computers 13(1): 70-78 (1996) |
1995 |
4 | EE | Bernhard M. Riess,
Heiko A. Giselbrecht,
Bernd Wurth:
A new K-way partitioning approach for multiple types of FPGAs.
ASP-DAC 1995 |
3 | EE | Bernd Wurth,
Klaus Eckl,
Kurt Antreich:
Functional Multiple-Output Decomposition: Theory and an Implicit Algorithm.
DAC 1995: 54-59 |
2 | EE | Bernhard Rohfleisch,
Bernd Wurth,
Kurt Antreich:
Logic Clause Analysis for Delay Optimization.
DAC 1995: 668-672 |
1994 |
1 | | Bernd Wurth,
Norbert Wehn:
Efficient Calculation of Boolean Relations for Multi-Level Logic Optimization.
EDAC-ETC-EUROASIC 1994: 630-634 |