| 1999 |
|---|
| 4 | | J. Soares Augusto,
C. F. Beltrá Almeida:
FASTNR: an Efficient Fault Simulator for Linear and Nonlinear DC Circuits.
VLSI 1999: 269-280 |
| 1994 |
|---|
| 3 | | J. Soares Augusto,
C. F. Beltrá Almeida:
New Algorithms in Piecewise Linear Resistive Simulation.
ISCAS 1994: 117-120 |
| 1991 |
|---|
| 2 | EE | João Paulo Teixeira,
Isabel C. Teixeira,
C. F. Beltrá Almeida,
Fernando M. Gonçalves,
J. Gonçalves:
A methodology for testability enhancement at layout level.
J. Electronic Testing 1(4): 287-299 (1991) |
| 1990 |
|---|
| 1 | EE | João Paulo Teixeira,
Isabel C. Teixeira,
C. F. Beltrá Almeida,
Fernando M. Gonçalves,
J. Gonçalves,
R. Crespo:
A strategy for testability enhancement at layout level.
EURO-DAC 1990: 413-417 |
