Juan J. Rodríguez-Andina

2008
12	EE	Jorge Semião, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Process Tolerant Design Using Thermal and Power-Supply Tolerance in Pipeline Based Circuits. DDECS 2008: 34-37
2007
11		Jorge Semião, J. Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Improving Tolerance to Power-Supply and Temperature Variations in Synchronous Circuits. DDECS 2007: 295-300
10	EE	Jorge Semião, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino Bicho Dos Santos, Isabel C. Teixeira, João Paulo Teixeira: Improving the Tolerance of Pipeline Based Circuits to Power Supply or Temperature Variations. DFT 2007: 303-311
9	EE	Jorge Semião, J. Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: On-line Dynamic Delay Insertion to Improve Signal Integrity in Synchronous Circuits. IOLTS 2007: 167-172
8	EE	Jorge Semião, J. Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Enhancing the Tolerance to Power-Supply Instability in Digital Circuits. ISVLSI 2007: 207-212
2006
7	EE	Enrique Soto, Elena Lago, Juan J. Rodríguez-Andina: FPGA Implementation of High-Performance PHM / DPHM Schedulers. FPL 2006: 1-4
6	EE	M. Rodríguez-Irago, Juan J. Rodríguez-Andina, Fabian Vargas, Jorge Semião, Isabel C. Teixeira, João Paulo Teixeira: Dynamic Fault Detection in Digital Systems Using Dynamic Voltage Scaling and Multi-Temperature Schemes. IOLTS 2006: 257-262
2005
5	EE	Miguel Pereira, Enrique Soto, Juan J. Rodríguez-Andina, F. Javier González-Castaño: High-Level Modelling and Detection of the Faulty Behaviour of VOQ Switches under Balanced Traffic. DSD 2005: 282-288
4	EE	Lucía Costas, Juan J. Rodríguez-Andina: Characterization of Wavelet-Based Image Coding Systems for Algorithmic Fault Detection. DSD 2005: 64-71
3	EE	M. Rodríguez-Irago, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Dynamic Fault Test and Diagnosis in Digital Systems Using Multiple Clock Schemes and Multi-VDD Test. IOLTS 2005: 281-286
2000
2		Santiago Fernández-Gomez, Juan J. Rodríguez-Andina, Enrique Mandado: Concurrent error detection in block ciphers ITC 2000: 979-984
1994
1		Juan J. Rodríguez-Andina, J. Alvarez, Enrique Mandado: Design of Safety Systems Using Field Programmable Gate Arrays. FPL 1994: 341-343

Coauthor Index

1	J. Alvarez	[1]
2	Lucía Costas	[4]
3	Santiago Fernández-Gomez	[2]
4	J. Freijedo	[8] [9] [11]
5	F. Javier González-Castaño	[5]
6	Elena Lago	[7]
7	Enrique Mandado	[1] [2]
8	Miguel Pereira	[5]
9	M. Rodríguez-Irago	[3] [6]
10	Marcelino B. Santos	[3] [8] [9] [11] [12]
11	Marcelino Bicho Dos Santos	[10]
12	Jorge Semião	[6] [8] [9] [10] [11] [12]
13	Enrique Soto	[5] [7]
14	Isabel C. Teixeira	[3] [6] [8] [9] [10] [11] [12]
15	João Paulo Teixeira	[3] [6] [8] [9] [10] [11] [12]
16	Fabian Vargas	[3] [6] [8] [9] [10] [11] [12]

Colors in the list of coauthors