| 2007 |
|---|
| 5 | EE | Yow-Tyng Nieh,
Shih-Hsu Huang,
Sheng-Yu Hsu:
Opposite-Phase Clock Tree for Peak Current Reduction.
IEICE Transactions 90-A(12): 2727-2735 (2007) |
| 2005 |
|---|
| 4 | EE | Yi-Ping You,
Chun-Yen Tseng,
Yu-Hui Huang,
Po-Chiun Huang,
TingTing Hwang,
Sheng-Yu Hsu:
Low-power techniques for network security processors.
ASP-DAC 2005: 355-360 |
| 3 | EE | Yen-Fong Lee,
Shi-Yu Huang,
Sheng-Yu Hsu,
I-Ling Chen,
Cheng-Tao Shieh,
Jian-Cheng Lin,
Shih-Chieh Chang:
Power estimation starategies for a low-power security processor.
ASP-DAC 2005: 367-371 |
| 2 | EE | Tsuang-Wei Chang,
TingTing Hwang,
Sheng-Yu Hsu:
Functionality directed clustering for low power MTCMOS design.
ASP-DAC 2005: 862-867 |
| 1 | EE | Yow-Tyng Nieh,
Shih-Hsu Huang,
Sheng-Yu Hsu:
Minimizing peak current via opposite-phase clock tree.
DAC 2005: 182-185 |
