Chih-Wea Wang

2007
14	EE	Chih-Yen Lo, Chen-Hsing Wang, Kuo-Liang Cheng, Jing-Reng Huang, Chih-Wea Wang, Shin-Moe Wang, Cheng-Wen Wu: STEAC: A Platform for Automatic SOC Test Integration. IEEE Trans. VLSI Syst. 15(5): 541-545 (2007)
2004
13	EE	Yu-Tsao Hsing, Chih-Wea Wang, Ching-Wei Wu, Chih-Tsun Huang, Cheng-Wen Wu: Failure Factor Based Yield Enhancement for SRAM Designs. DFT 2004: 20-28
12	EE	Kuo-Liang Cheng, Jing-Reng Huang, Chih-Wea Wang, Chih-Yen Lo, Li-Ming Denq, Chih-Tsun Huang, Shin-Wei Hung, Jye-Yuan Lee: An SOC Test Integration Platform and Its Industrial Realization. ITC 2004: 1213-1222
2003
11	EE	Kuo-Liang Cheng, Chih-Wea Wang, Jih-Nung Lee, Yung-Fa Chou, Chih-Tsun Huang, Cheng-Wen Wu: FAME: A Fault-Pattern Based Memory Failure Analysis Framework. ICCAD 2003: 595-598
10	EE	Chih-Wea Wang, Kuo-Liang Cheng, Jih-Nung Lee, Yung-Fa Chou, Chih-Tsun Huang, Cheng-Wen Wu, Frank Huang, Hong-Tzer Yang: Fault Pattern Oriented Defect Diagnosis for Memories. ITC 2003: 29-38
9	EE	Chih-Wea Wang, Kuo-Liang Cheng, Chih-Tsun Huang, Cheng-Wen Wu: Test and Diagnosis of Word-Oriented Multiport Memories. VTS 2003: 248-253
2002
8	EE	Chih-Wea Wang, Jing-Reng Huang, Yen-Fu Lin, Kuo-Liang Cheng, Chih-Tsun Huang, Cheng-Wen Wu, Youn-Long Lin: Test Scheduling of BISTed Memory Cores for SOC. Asian Test Symposium 2002: 356-
7	EE	Huan-Shan Hsu, Jing-Reng Huang, Kuo-Liang Cheng, Chih-Wea Wang, Chih-Tsun Huang, Cheng-Wen Wu, Youn-Long Lin: Test Scheduling and Test Access Architecture Optimization for System-on-Chip. Asian Test Symposium 2002: 411-
6	EE	Kuo-Liang Cheng, Jen-Chieh Yeh, Chih-Wea Wang, Chih-Tsun Huang, Cheng-Wen Wu: RAMSES-FT: A Fault Simulator for Flash Memory Testing and Diagnostics. VTS 2002: 281-288
5	EE	Chih-Wea Wang, Chi-Feng Wu, Jin-Fu Li, Cheng-Wen Wu, Tony Teng, Kevin Chiu, Hsiao-Ping Lin: A Built-in Self-Test Scheme with Diagnostics Support for Embedded SRAM. J. Electronic Testing 18(6): 637-647 (2002)
2001
4	EE	Chih-Wea Wang, Ruey-Shing Tzeng, Chi-Feng Wu, Chih-Tsun Huang, Cheng-Wen Wu, Shi-Yu Huang, Shyh-Horng Lin, Hsin-Po Wang: A Built-in Self-Test and Self-Diagnosis Scheme for Heterogeneous SRAM Clusters. Asian Test Symposium 2001: 103-
3	EE	Chi-Feng Wu, Chih-Tsun Huang, Kuo-Liang Cheng, Chih-Wea Wang, Cheng-Wen Wu: Simulation-Based Test Algorithm Generation and Port Scheduling for Multi-Port Memories. DAC 2001: 301-306
2000
2	EE	Chih-Wea Wang, Chi-Feng Wu, Jin-Fu Li, Cheng-Wen Wu, Tony Teng, Kevin Chiu, Hsiao-Ping Lin: A built-in self-test and self-diagnosis scheme for embedded SRAM. Asian Test Symposium 2000: 45-50
1		Chi-Feng Wu, Chih-Tsun Huang, Chih-Wea Wang, Kuo-Liang Cheng, Cheng-Wen Wu: Error Catch and Analysis for Semiconductor Memories Using March Tests. ICCAD 2000: 468-471

Coauthor Index

1	Kuo-Liang Cheng	[1] [3] [6] [7] [8] [9] [10] [11] [12] [14]
2	Kevin Chiu	[2] [5]
3	Yung-Fa Chou	[10] [11]
4	Li-Ming Denq	[12]
5	Yu-Tsao Hsing	[13]
6	Huan-Shan Hsu	[7]
7	Chih-Tsun Huang	[1] [3] [4] [6] [7] [8] [9] [10] [11] [12] [13]
8	Frank Huang	[10]
9	Jing-Reng Huang	[7] [8] [12] [14]
10	Shi-Yu Huang	[4]
11	Shin-Wei Hung	[12]
12	Jih-Nung Lee	[10] [11]
13	Jye-Yuan Lee	[12]
14	Jin-Fu Li	[2] [5]
15	Hsiao-Ping Lin	[2] [5]
16	Shyh-Horng Lin	[4]
17	Yen-Fu Lin	[8]
18	Youn-Long Lin	[7] [8]
19	Chih-Yen Lo	[12] [14]
20	Tony Teng	[2] [5]
21	Ruey-Shing Tzeng	[4]
22	Chen-Hsing Wang	[14]
23	Hsin-Po Wang	[4]
24	Shin-Moe Wang	[14]
25	Cheng-Wen Wu	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [13] [14]
26	Chi-Feng Wu	[1] [2] [3] [4] [5]
27	Ching-Wei Wu	[13]
28	Hong-Tzer Yang	[10]
29	Jen-Chieh Yeh	[6]