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Charbel J. Akl

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2009
11EECharbel J. Akl, Rafic A. Ayoubi, Magdy A. Bayoumi: An effective staggered-phase damping technique for suppressing power-gating resonance noise during mode transition. ISQED 2009: 116-119
10EECharbel J. Akl, Rafic A. Ayoubi, Magdy A. Bayoumi: Post-Silicon Clock-nvert (PSCI) for reducing process-variation induced skew in buffered clock networks. ISQED 2009: 794-798
2008
9EECharbel J. Akl, Magdy A. Bayoumi: Assumers for high-speed single and multi-cycle on-chip interconnect with low repeater count. ACM Great Lakes Symposium on VLSI 2008: 327-332
8EECharbel J. Akl, Magdy A. Bayoumi: Cost-effective and low-power memory address bus encodings. ISCAS 2008: 2010-2013
7EECharbel J. Akl, Magdy A. Bayoumi: Reducing wakeup latency and energy of MTCMOS circuits via keeper insertion. ISLPED 2008: 69-74
6EECharbel J. Akl, Magdy A. Bayoumi: Feedback-Switch Logic (FSL): A High-Speed Low-Power Differential Dynamic-Like Static CMOS Circuit Family. ISQED 2008: 385-390
5EECharbel J. Akl, Magdy A. Bayoumi: Wiring-Area Efficient Simultaneous Bidirectional Point-to-Point Link for Inter-Block On-Chip Signaling. VLSI Design 2008: 195-200
4EECharbel J. Akl, Magdy A. Bayoumi: Self-Sleep Buffer for Distributed MTCMOS Design. VLSI Design 2008: 673-678
3EECharbel J. Akl, Magdy A. Bayoumi: Reducing Interconnect Delay Uncertainty via Hybrid Polarity Repeater Insertion. IEEE Trans. VLSI Syst. 16(9): 1230-1239 (2008)
2007
2EECharbel J. Akl, Magdy A. Bayoumi: Transition Skew Coding: A Power and Area Efficient Encoding Technique for Global On-Chip Interconnects. ASP-DAC 2007: 696-701
1EECharbel J. Akl, Magdy A. Bayoumi: Reducing Delay Uncertainty of On-Chip Interconnects by Combining Inverting and Non-Inverting Repeaters Insertion. ISQED 2007: 219-224

Coauthor Index

1Rafic A. Ayoubi [10] [11]
2Magdy A. Bayoumi (Magdy Bayoumi) [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)