Mihail Petrov

2007
14	EE	Mihail Petrov, Manfred Glesner: A Scalable Resampling Architecture. GLOBECOM 2007: 3102-3106
13	EE	Mihail Petrov, Manfred Glesner: An Efficient Fractional-Rate Interpolation Architecture. GLOBECOM 2007: 4554-4558
2005
12		Mihail Petrov, Manfred Glesner: Optimal FFT Architecture Selection for OFDM Receivers on FPGA. FPT 2005: 313-314
11		Mihail Petrov, Manfred Glesner: A State-Serial Viterbi Decoder Architecture for Digital Radio on FPGA. FPT 2005: 323-324
10	EE	Alberto García Ortiz, Tudor Murgan, Mihail Petrov, Manfred Glesner: A linear model for high-level delay estimation in VDSM on-chip interconnects. ISCAS (2) 2005: 1078-1081
9	EE	Manfred Glesner, Heiko Hinkelmann, Thomas Hollstein, Leandro Soares Indrusiak, Tudor Murgan, Abdulfattah Mohammad Obeid, Mihail Petrov, Thilo Pionteck, Peter Zipf: Reconfigurable Embedded Systems: An Application-Oriented Perspective on Architectures and Design Techniques. SAMOS 2005: 12-21
2004
8	EE	Manfred Glesner, Thomas Hollstein, Leandro Soares Indrusiak, Peter Zipf, Thilo Pionteck, Mihail Petrov, Heiko Zimmer, Tudor Murgan: Reconfigurable platforms for ubiquitous computing. Conf. Computing Frontiers 2004: 377-389
7	EE	Tudor Murgan, Mihail Petrov, Mateusz Majer, Peter Zipf, Manfred Glesner, Ulrich Heinkel, Jörg Pleickhardt, Bernd Bleisteiner: Adaptive architectures for an OTN processor: reducing design costs through reconfigurability and multiprocessing. Conf. Computing Frontiers 2004: 404-418
6	EE	Mihail Petrov, Tudor Murgan, F. May, Martin Vorbach, Peter Zipf, Manfred Glesner: The XPP Architecture and Its Co-simulation Within the Simulink Environment. FPL 2004: 761-770
5		Mihail Petrov, Tudor Murgan, Abdulfattah Mohammad Obeid, Cristian Chitu, Peter Zipf, Jörg Brakensiek, Manfred Glesner: Dynamic power optimization of the trace-back process for the Viterbi algorithm. ISCAS (2) 2004: 721-724
4	EE	Tudor Murgan, Alberto García Ortiz, Clemens Schlachta, Heiko Zimmer, Mihail Petrov, Manfred Glesner: On Timing and Power Consumption in Inductively Coupled On-Chip Interconnects. PATMOS 2004: 819-828
3	EE	Tudor Murgan, Clemens Schlachta, Mihail Petrov, Leandro Soares Indrusiak, Alberto García Ortiz, Manfred Glesner, Ricardo A. L. Reis: Accurate capture of timing parameters in inductively-coupled on-chip interconnects. SBCCI 2004: 117-122
2003
2	EE	Tudor Murgan, Mihail Petrov, Alberto García Ortiz, Ralf Ludewig, Peter Zipf, Thomas Hollstein, Manfred Glesner, Bernard Ölkrug, Jörg Brakensiek: Evaluation and Run-Time Optimization of On-chip Communication Structures in Reconfigurable Architectures. FPL 2003: 1111-1114
1		Mihail Petrov, Abdulfattah Mohammad Obeid, Tudor Murgan, Peter Zipf, Jörg Brakensiek, Bernard Ölkrug, Manfred Glesner: An Adaptive Trace-Back Solution for State-Parallel Viterbi Decoders. VLSI-SOC 2003: 167-

Coauthor Index

1	Bernd Bleisteiner	[7]
2	Jörg Brakensiek	[1] [2] [5]
3	Cristian Chitu	[5]
4	Manfred Glesner	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14]
5	Ulrich Heinkel	[7]
6	Heiko Hinkelmann	[9]
7	Thomas Hollstein	[2] [8] [9]
8	Leandro Soares Indrusiak	[3] [8] [9]
9	Ralf Ludewig	[2]
10	Mateusz Majer	[7]
11	F. May	[6]
12	Tudor Murgan	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10]
13	Abdulfattah Mohammad Obeid	[1] [5] [9]
14	Bernard Ölkrug	[1] [2]
15	Alberto García Ortiz	[2] [3] [4] [10]
16	Thilo Pionteck	[8] [9]
17	Jörg Pleickhardt	[7]
18	Ricardo Augusto da Luz Reis (Ricardo A. L. Reis, Ricardo Reis)	[3]
19	Clemens Schlachta	[3] [4]
20	Martin Vorbach	[6]
21	Heiko Zimmer	[4] [8]
22	Peter Zipf	[1] [2] [5] [6] [7] [8] [9]