| 2008 |
|---|
| 11 | EE | Wolfgang Nebel,
Domenik Helms:
On leakage currents: sources and reduction for transistors, gates, memories and digital systems.
ISLPED 2008: 349-350 |
| 2007 |
|---|
| 10 | EE | Domenik Helms,
Olaf Meyer,
Marko Hoyer,
Wolfgang Nebel:
Voltage- and ABB-island optimization in high level synthesis.
ISLPED 2007: 153-158 |
| 9 | EE | Marko Hoyer,
Domenik Helms,
Wolfgang Nebel:
Modelling the Impact of High Level Leakage Optimization Techniques on the Delay of RT-Components.
PATMOS 2007: 171-180 |
| 8 | EE | Sven Rosinger,
Domenik Helms,
Wolfgang Nebel:
RTL Power Modeling and Estimation of Sleep Transistor Based Power Gating.
PATMOS 2007: 278-287 |
| 2006 |
|---|
| 7 | EE | Domenik Helms,
Günter Ehmen,
Wolfgang Nebel:
Analysis and modeling of subthreshold leakage of RT-components under PTV and state variation.
ISLPED 2006: 220-225 |
| 6 | EE | Domenik Helms,
Marko Hoyer,
Wolfgang Nebel:
Accurate PTV, State, and ABB Aware RTL Blackbox Modeling of Subthreshold, Gate, and PN-Junction Leakage.
PATMOS 2006: 56-65 |
| 2005 |
|---|
| 5 | EE | Arne Schulz,
Andreas Schallenberg,
Domenik Helms,
Milan Schulte,
Axel Reimer,
Wolfgang Nebel:
A High Level Constant Coefficient Multiplier Power Model for Power Estimation on High Levels of Abstraction.
PATMOS 2005: 146-155 |
| 2004 |
|---|
| 4 | EE | Domenik Helms,
Eike Schmidt,
Wolfgang Nebel:
Leakage in CMOS Circuits - An Introduction.
PATMOS 2004: 17-35 |
| 2003 |
|---|
| 3 | EE | Ansgar Stammermann,
Domenik Helms,
Milan Schulte,
Arne Schulz,
Wolfgang Nebel:
Binding, Allocation and Floorplanning in Low Power High-Level Synthesis.
ICCAD 2003: 544-550 |
| 2 | EE | Ansgar Stammermann,
Domenik Helms,
Milan Schulte,
Arne Schulz,
Wolfgang Nebel:
Interconnect Driven Low Power High-Level Synthesis.
PATMOS 2003: 131-140 |
| 2002 |
|---|
| 1 | EE | Domenik Helms,
Eike Schmidt,
Arne Schulz,
Ansgar Stammermann,
Wolfgang Nebel:
An Improved Power Macro-Model for Arithmetic Datapath Components.
PATMOS 2002: 16-24 |
