| 2003 |
|---|
| 7 | EE | Reinaldo A. Bergamaschi,
Youngsoo Shin,
Nagu R. Dhanwada,
Subhrajit Bhattacharya,
William E. Dougherty,
Indira Nair,
John A. Darringer,
Sarala Paliwal:
SEAS: a system for early analysis of SoCs.
CODES+ISSS 2003: 150-155 |
| 6 | EE | Prabhakar Kudva,
Andrew Sullivan,
William E. Dougherty:
Measurements for structural logic synthesis optimizations.
IEEE Trans. on CAD of Integrated Circuits and Systems 22(6): 665-674 (2003) |
| 2002 |
|---|
| 5 | EE | Prabhakar Kudva,
Andrew Sullivan,
William E. Dougherty:
Metrics for structural logic synthesis.
ICCAD 2002: 551-556 |
| 4 | | Prabhakar Kudva,
Andrew Sullivan,
William E. Dougherty:
Metrics for Structural Logic Synthesis.
IWLS 2002: 1-6 |
| 2000 |
|---|
| 3 | EE | William E. Dougherty,
Donald E. Thomas:
Unifying behavioral synthesis and physical design.
DAC 2000: 756-761 |
| 1999 |
|---|
| 2 | EE | William E. Dougherty,
Donald E. Thomas:
Modeling and automating selection of guarding techniques for datapath elements.
ISLPED 1999: 182-187 |
| 1 | EE | William E. Dougherty,
David J. Pursley,
Donald E. Thomas:
Subsetting Behavioral Intellectual Property for Low Power ASIP Design.
VLSI Signal Processing 21(3): 209-218 (1999) |
