2008 |
50 | EE | Norbert Dumas,
Florence Azaïs,
Frédérick Mailly,
Andrew Richardson,
Pascal Nouet:
A novel method for test and calibration of capacitive accelerometers with a fully electrical setup.
DDECS 2008: 304-309 |
2007 |
49 | EE | Vincent Kerzerho,
Philippe Cauvet,
Serge Bernard,
Florence Azaïs,
Mariane Comte,
Michel Renovell:
"Analogue Network of Converters": A DFT Technique to Test a Complete Set of ADCs and DACs Embedded in a Complex SiP or SOC.
European Test Symposium 2007: 211-216 |
2006 |
48 | EE | Vincent Kerzerho,
Philippe Cauvet,
Serge Bernard,
Florence Azaïs,
Mariane Comte,
Michel Renovell:
"Analogue Network of Converters": A DFT Technique to Test a Complete Set of ADCs and DACs Embedded in a Complex SiP or SOC.
European Test Symposium 2006: 159-164 |
47 | EE | Vincent Kerzerho,
Philippe Cauvet,
Serge Bernard,
Florence Azaïs,
Mariane Comte,
Michel Renovell:
A Novel DFT Technique for Testing Complete Sets of ADCs and DACs in Complex SiPs.
IEEE Design & Test of Computers 23(3): 234-243 (2006) |
46 | EE | Norbert Dumas,
Florence Azaïs,
Laurent Latorre,
Pascal Nouet:
Electro-thermal Stimuli for MEMS Testing in FSBM Technology.
J. Electronic Testing 22(2): 189-198 (2006) |
45 | EE | Christophe Entringer,
Philippe Flatresse,
Philippe Galy,
Florence Azaïs,
Pascal Nouet:
Electro-thermal short pulsed simulation for SOI technology.
Microelectronics Reliability 46(9-11): 1482-1485 (2006) |
2005 |
44 | EE | Norbert Dumas,
Florence Azaïs,
Laurent Latorre,
Pascal Nouet:
On-Chip Electro-Thermal Stimulus Generation for a MEMS-Based Magnetic Field Sensor.
VTS 2005: 213-218 |
43 | EE | Gustavo Pereira,
Antonio Andrade Jr.,
Tiago R. Balen,
Marcelo Lubaszewski,
Florence Azaïs,
Michel Renovell:
Testing the Interconnect Networks and I/O Resources of Field Programmable Analog Arrays.
VTS 2005: 389-394 |
42 | EE | Jean Marc Gallière,
Michel Renovell,
Florence Azaïs,
Yves Bertrand:
Delay Testing Viability of Gate Oxide Short Defects.
J. Comput. Sci. Technol. 20(2): 195-200 (2005) |
41 | EE | Florence Azaïs,
Marcelo Lubaszewski,
Pascal Nouet,
Michel Renovell:
A Strategy for Optimal Test Point Insertion in Analog Cascaded Filters.
J. Electronic Testing 21(1): 9-16 (2005) |
40 | EE | Tiago R. Balen,
Antonio Q. Andrade,
Florence Azaïs,
Marcelo Lubaszewski,
Michel Renovell:
Applying the Oscillation Test Strategy to FPAA's Configurable Analog Blocks.
J. Electronic Testing 21(2): 135-146 (2005) |
39 | EE | Florence Azaïs,
Serge Bernard,
Yves Bertrand,
Mariane Comte,
Michel Renovell:
Efficiency of Optimized Dynamic Test Flows for ADCs: Sensitivity to Specifications.
J. Electronic Testing 21(3): 291-298 (2005) |
38 | EE | Antonio Andrade Jr.,
Gustavo Vieira,
Tiago R. Balen,
Marcelo Lubaszewski,
Florence Azaïs,
Michel Renovell:
Built-in self-test of global interconnects of field programmable analog arrays.
Microelectronics Journal 36(12): 1112-1123 (2005) |
37 | EE | Florence Azaïs,
B. Caillard,
S. Dournelle,
P. Salomé,
Pascal Nouet:
A new multi-finger SCR-based structure for efficient on-chip ESD protection.
Microelectronics Reliability 45(2): 233-243 (2005) |
2004 |
36 | EE | Antonio Zenteno,
Víctor H. Champac,
Michel Renovell,
Florence Azaïs:
Analysis and Attenuation Proposal in Ground Bounce.
Asian Test Symposium 2004: 460-463 |
35 | EE | Tiago R. Balen,
Antonio Andrade Jr.,
Florence Azaïs,
Michel Renovell,
Marcelo Lubaszewski:
Testing the Configurable Analog Blocks of Field Programmable Analog Arrays.
ITC 2004: 893-902 |
34 | EE | Tiago R. Balen,
Antonio Andrade Jr.,
Florence Azaïs,
Marcelo Lubaszewski,
Michel Renovell:
An Approach to the Built-In Self-Test of Field Programmable Analog Arrays.
VTS 2004: 383-388 |
33 | EE | Serge Bernard,
Mariane Comte,
Florence Azaïs,
Yves Bertrand,
Michel Renovell:
Efficiency of Spectral-Based ADC Test Flows to Detect Static Errors.
J. Electronic Testing 20(3): 257-267 (2004) |
32 | EE | Florence Azaïs,
Serge Bernard,
Yves Bertrand,
Mariane Comte,
Michel Renovell:
Correlation Between Static and Dynamic Parameters of A-to-D Converters: In the View of a Unique Test Procedure.
J. Electronic Testing 20(4): 375-387 (2004) |
2003 |
31 | EE | Michel Renovell,
Jean Marc Gallière,
Florence Azaïs,
Yves Bertrand:
Delay Testing of MOS Transistor with Gate Oxide Short.
Asian Test Symposium 2003: 168-173 |
30 | EE | Serge Bernard,
Mariane Comte,
Florence Azaïs,
Yves Bertrand,
Michel Renovell:
A New Methodology For ADC Test Flow Optimization.
ITC 2003: 201-209 |
29 | EE | Florence Azaïs,
Yves Bertrand,
Michel Renovell,
André Ivanov,
Sassan Tabatabaei:
An All-Digital DFT Scheme for Testing Catastrophic Faults in PLLs.
IEEE Design & Test of Computers 20(1): 60-67 (2003) |
28 | EE | Uros Kac,
Franc Novak,
Florence Azaïs,
Pascal Nouet,
Michel Renovell:
Extending IEEE Std. 1149.4 Analog Boundary Modules to Enhance Mixed-Signal Test.
IEEE Design & Test of Computers 20(2): 32-39 (2003) |
27 | EE | Michel Renovell,
Jean Marc Gallière,
Florence Azaïs,
Yves Bertrand:
Modeling the Random Parameters Effects in a Non-Split Model of Gate Oxide Short.
J. Electronic Testing 19(4): 377-386 (2003) |
26 | EE | Serge Bernard,
Florence Azaïs,
Yves Bertrand,
Michel Renovell:
On-Chip Generation of Ramp and Triangle-Wave Stimuli for ADC BIST.
J. Electronic Testing 19(4): 469-479 (2003) |
25 | EE | Florence Azaïs,
Serge Bernard,
Yves Bertrand,
Mariane Comte,
Michel Renovell:
A-to-D converters static error detection from dynamic parameter measurement.
Microelectronics Journal 34(10): 945-953 (2003) |
2002 |
24 | EE | Yves Bertrand,
Marie-Lise Flottes,
Florence Azaïs,
Serge Bernard,
Laurent Latorre,
Regis Lorival:
European Network for Test Education.
DELTA 2002: 230-234 |
23 | EE | Michel Renovell,
Florence Azaïs,
Yves Bertrand:
Improving Defect Detection in Static-Voltage Testing.
IEEE Design & Test of Computers 19(6): 83-89 (2002) |
2001 |
22 | EE | Florence Azaïs,
Serge Bernard,
Yves Bertrand,
Michel Renovell:
Implementation of a linear histogram BIST for ADCs.
DATE 2001: 590-595 |
21 | EE | Serge Bernard,
Florence Azaïs,
Yves Bertrand,
Michel Renovell:
Analog BIST Generator for ADC Testing.
DFT 2001: 338-346 |
20 | | Michel Renovell,
Jean Marc Gallière,
Florence Azaïs,
Serge Bernard,
Yves Bertrand:
Boolean and current detection of MOS transistor with gate oxide short.
ITC 2001: 1039-1048 |
19 | | Florence Azaïs,
Serge Bernard,
Yves Bertrand,
Michel Renovell:
On-chip Generator of a Saw-Tooth Test Stimulus for ADC BIST.
VLSI-SOC 2001: 425-436 |
18 | EE | Florence Azaïs,
Serge Bernard,
Yves Bertrand,
Xavier Michel,
Michel Renovell:
A Low-Cost Adaptive Ramp Generator for Analog BIST Applications.
VTS 2001: 266-271 |
17 | EE | André Ivanov,
Sumbal Rafiq,
Michel Renovell,
Florence Azaïs,
Yves Bertrand:
On the detectability of CMOS floating gate transistor faults.
IEEE Trans. on CAD of Integrated Circuits and Systems 20(1): 116-128 (2001) |
16 | EE | Florence Azaïs,
Serge Bernard,
Yves Bertrand,
Michel Renovell:
A Low-Cost BIST Architecture for Linear Histogram Testing of ADCs.
J. Electronic Testing 17(2): 139-147 (2001) |
15 | EE | Florence Azaïs,
Serge Bernard,
Yves Bertrand,
Michel Renovell:
Optimizing Sinusoidal Histogram Test for Low Cost ADC BIST.
J. Electronic Testing 17(3-4): 255-266 (2001) |
2000 |
14 | EE | Luigi Carro,
Érika F. Cota,
Marcelo Lubaszewski,
Yves Bertrand,
Florence Azaïs,
Michel Renovell:
TI-BIST: a temperature independent analog BIST for switched-capacitor filters.
Asian Test Symposium 2000: 78-83 |
13 | EE | Érika F. Cota,
Michel Renovell,
Florence Azaïs,
Yves Bertrand,
Luigi Carro,
Marcelo Lubaszewski:
Reuse of Existing Resources for Analog BIST of a Switch Capacitor Filte.
DATE 2000: 226- |
12 | EE | Michel Renovell,
Florence Azaïs,
Serge Bernard,
Yves Bertrand:
Hardware Resource Minimization for Histogram-Based ADC BIST.
VTS 2000: 247-254 |
11 | EE | Michel Renovell,
Florence Azaïs,
J-C. Bodin,
Yves Bertrand:
Combining Functional and Structural Approaches for Switched-Current Circuit Testing.
J. Electronic Testing 16(3): 259-267 (2000) |
1999 |
10 | | Michel Renovell,
André Ivanov,
Yves Bertrand,
Florence Azaïs,
Sumbal Rafiq:
Optimal conditions for Boolean and current detection of floating gate faults.
ITC 1999: 477-486 |
9 | EE | Yves Bertrand,
Florence Azaïs,
Marie-Lise Flottes,
Regis Lorival:
A Successful Distance-Learning Experience for IC Test Education.
MSE 1999: 20-21 |
8 | EE | Michel Renovell,
Florence Azaïs,
Yves Bertrand:
Detection of Defects Using Fault Model Oriented Test Sequences.
J. Electronic Testing 14(1-2): 13-22 (1999) |
1998 |
7 | EE | Michel Renovell,
Florence Azaïs,
J-C. Bodin,
Yves Bertrand:
BISTing Switched-Current Circuits.
Asian Test Symposium 1998: 372-377 |
6 | EE | Florence Azaïs,
André Ivanov,
Michel Renovell,
Yves Bertrand:
A Methodology and Design for Effective Testing of Voltage-Controlled Oscillators (VCOs.
Asian Test Symposium 1998: 383-387 |
5 | EE | Michel Renovell,
Florence Azaïs,
Yves Bertrand:
Optimized Implementations of the Multi-Configuration DFT Technique for Analog Circuits.
DATE 1998: 815-821 |
4 | EE | Florence Azaïs,
Michel Renovell,
Yves Bertrand,
J-C. Bodin:
Design-For-Testability for Switched-Current Circuits.
VTS 1998: 370-375 |
1997 |
3 | EE | Michel Renovell,
Florence Azaïs,
Yves Bertrand:
On-chip analog output response compaction.
ED&TC 1997: 568-572 |
1996 |
2 | EE | Michel Renovell,
Florence Azaïs,
Yves Bertrand:
The multi-configuration: A DFT technique for analog circuits.
VTS 1996: 54-59 |
1995 |
1 | EE | Michel Renovell,
Florence Azaïs,
Yves Bertrand:
A design-for-test technique for multistage analog circuits.
Asian Test Symposium 1995: 113-119 |