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Ahcène Bounceur

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2009
9EEHaralampos-G. D. Stratigopoulos, Salvador Mir, Ahcène Bounceur: Evaluation of Analog/RF Test Measurements at the Design Stage. IEEE Trans. on CAD of Integrated Circuits and Systems 28(4): 582-590 (2009)
2007
8EEAhcène Bounceur, Salvador Mir, Emmanuel Simeu, Luís Rolíndez: Estimation of Test Metrics for the Optimisation of Analogue Circuit Testing. J. Electronic Testing 23(6): 471-484 (2007)
2006
7EEAchraf Dhayni, Salvador Mir, Libor Rufer, Ahcène Bounceur: Pseudorandom functional BIST for linear and nonlinear MEMS. DATE 2006: 664-669
6EEAhcène Bounceur, Salvador Mir, Luís Rolíndez, Emmanuel Simeu: CAT platform for analogue and mixed-signal test evaluation and optimization. VLSI-SoC 2006: 320-325
5EELivier Lizzarraga, Salvador Mir, Gilles Sicard, Ahcène Bounceur: Study of a BIST Technique for CMOS Active Pixel Sensors. VLSI-SoC 2006: 326-331
4EELuís Rolíndez, Salvador Mir, Ahcène Bounceur, Jean-Louis Carbonéro: A SNDR BIST for Sigma-Delta Analogue-to-Digital Converters. VTS 2006: 314-319
3EELuís Rolíndez, Salvador Mir, Ahcène Bounceur, Jean-Louis Carbonéro: A BIST Scheme for SNDR Testing of SigmaDelta ADCs Using Sine-Wave Fitting. J. Electronic Testing 22(4-6): 325-335 (2006)
2005
2EEAchraf Dhayni, Salvador Mir, Libor Rufer, Ahcène Bounceur: On-chip Pseudorandom Testing for Linear and Nonlinear MEMS. VLSI-SoC 2005: 245-266
2004
1EELuís Rolíndez, Salvador Mir, Guillaume Prenat, Ahcène Bounceur: A 0.18 µm CMOS Implementation of On-chip Analogue Test Signal Generation from Digital Test Patterns. DATE 2004: 706-707

Coauthor Index

1Jean-Louis Carbonéro [3] [4]
2Achraf Dhayni [2] [7]
3Livier Lizzarraga [5]
4Salvador Mir [1] [2] [3] [4] [5] [6] [7] [8] [9]
5Guillaume Prenat [1]
6Luís Rolíndez [1] [3] [4] [6] [8]
7Libor Rufer [2] [7]
8Gilles Sicard [5]
9Emmanuel Simeu [6] [8]
10Haralampos-G. D. Stratigopoulos [9]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)