| 2007 |
|---|
| 11 | EE | Mandeep Singh,
Christophe Giacomotto,
Bart R. Zeydel,
Vojin G. Oklobdzija:
Logic Style Comparison for Ultra Low Power Operation in 65nm Technology.
PATMOS 2007: 181-190 |
| 2006 |
|---|
| 10 | EE | Bart R. Zeydel,
Vojin G. Oklobdzija:
Methodology for Energy-Efficient Digital Circuit Sizing: Important Issues and Design Limitations.
PATMOS 2006: 127-136 |
| 9 | EE | Milena Vratonjic,
Bart R. Zeydel,
Vojin G. Oklobdzija:
Circuit Sizing and Supply-Voltage Selection for Low-Power Digital Circuit Design.
PATMOS 2006: 148-156 |
| 8 | EE | Xiao Yan Yu,
Robert K. Montoye,
Kevin J. Nowka,
Bart R. Zeydel,
Vojin G. Oklobdzija:
Circuit Design Style for Energy Efficiency: LSDL and Compound Domino.
PATMOS 2006: 47-55 |
| 7 | EE | Hoang Q. Dao,
Bart R. Zeydel,
Vojin G. Oklobdzija:
Energy optimization of pipelined digital systems using circuit sizing and supply scaling.
IEEE Trans. VLSI Syst. 14(2): 122-134 (2006) |
| 2005 |
|---|
| 6 | EE | Hoang Q. Dao,
Bart R. Zeydel,
Vojin G. Oklobdzija:
Architectural Considerations for Energy Efficiency.
ICCD 2005: 13-16 |
| 5 | EE | Milena Vratonjic,
Bart R. Zeydel,
Vojin G. Oklobdzija:
Low- and Ultra Low-Power Arithmetic Units: Design and Comparison.
ICCD 2005: 249-252 |
| 4 | EE | Bart R. Zeydel,
Theo T. J. H. Kluter,
Vojin G. Oklobdzija:
Efficient Mapping of Addition Recurrence Algorithms in CMOS.
IEEE Symposium on Computer Arithmetic 2005: 107-113 |
| 3 | EE | Vojin G. Oklobdzija,
Bart R. Zeydel,
Hoang Q. Dao,
Sanu Mathew,
Ram Krishnamurthy:
Comparison of high-performance VLSI adders in the energy-delay space.
IEEE Trans. VLSI Syst. 13(6): 754-758 (2005) |
| 2003 |
|---|
| 2 | EE | Vojin G. Oklobdzija,
Bart R. Zeydel,
Hoang Q. Dao,
Sanu Mathew,
Ram Krishnamurthy:
Energy-Delay Estimation Technique for High-Performance Microprocessor VLSI Adders.
IEEE Symposium on Computer Arithmetic 2003: 272-279 |
| 1 | EE | Hoang Q. Dao,
Bart R. Zeydel,
Vojin G. Oklobdzija:
Energy Optimization of High-Performance Circuits.
PATMOS 2003: 399-408 |
