| 2008 |
|---|
| 6 | EE | Flavio Carbognani,
Felix Bürgin,
Norbert Felber,
Hubert Kaeslin,
Wolfgang Fichtner:
Transmission Gates Combined With Level-Restoring CMOS Gates Reduce Glitches in Low-Power Low-Frequency Multipliers.
IEEE Trans. VLSI Syst. 16(7): 830-836 (2008) |
| 2007 |
|---|
| 5 | EE | Marc Simon Wegmueller,
Martin Hediger,
Thomas Kaufmann,
Felix Bürgin,
Wolfgang Fichtner:
Wireless Implant Communications for Biomedical Monitoring Sensor Network.
ISCAS 2007: 809-812 |
| 2006 |
|---|
| 4 | EE | Felix Bürgin,
Flavio Carbognani,
Martin Hediger,
Hektor Meier,
Robert Meyer-Piening,
Rafael Santschi,
Hubert Kaeslin,
Norbert Felber,
Wolfgang Fichtner:
Low-power architectural trade-offs in a VLSI implementation of an adaptive hearing aid algorithm.
DAC 2006: 558-561 |
| 3 | EE | Flavio Carbognani,
Felix Bürgin,
Norbert Felber,
Hubert Kaeslin,
Wolfgang Fichtner:
Two-phase resonant clocking for ultra-low-power hearing aid applications.
DATE 2006: 73-78 |
| 2 | EE | Flavio Carbognani,
Felix Bürgin,
Norbert Felber,
Hubert Kaeslin,
Wolfgang Fichtner:
42% power savings through glitch-reducing clocking strategy in a hearing aid application.
ISCAS 2006 |
| 2005 |
|---|
| 1 | EE | Flavio Carbognani,
Felix Bürgin,
Norbert Felber,
Hubert Kaeslin,
Wolfgang Fichtner:
Two-Phase Clocking and a New Latch Design for Low-Power Portable Applications.
PATMOS 2005: 446-455 |
