| 2009 |
|---|
| 9 | EE | Michael Brown,
Cyrus Bazeghi,
Matthew R. Guthaus,
Jose Renau:
Measuring and modeling variabilityusing low-cost FPGAs.
FPGA 2009: 286 |
| 2008 |
|---|
| 8 | EE | Matthew R. Guthaus,
Dennis Sylvester,
Richard B. Brown:
Clock tree synthesis with data-path sensitivity matching.
ASP-DAC 2008: 498-503 |
| 2006 |
|---|
| 7 | EE | Matthew R. Guthaus,
Dennis Sylvester,
Richard B. Brown:
Process-induced skew reduction in nominal zero-skew clock trees.
ASP-DAC 2006: 84-89 |
| 6 | EE | Matthew R. Guthaus,
Dennis Sylvester,
Richard B. Brown:
Clock buffer and wire sizing using sequential programming.
DAC 2006: 1041-1046 |
| 2005 |
|---|
| 5 | EE | Matthew R. Guthaus,
Natesan Venkateswaran,
Vladimir Zolotov,
Dennis Sylvester,
Richard B. Brown:
Optimization objectives and models of variation for statistical gate sizing.
ACM Great Lakes Symposium on VLSI 2005: 313-316 |
| 4 | | Matthew R. Guthaus,
Natesan Venkateswaran,
Chandu Visweswariah,
Vladimir Zolotov:
Gate sizing using incremental parameterized statistical timing analysis.
ICCAD 2005: 1029-1036 |
| 3 | EE | Rajiv A. Ravindran,
Robert M. Senger,
Eric D. Marsman,
Ganesh S. Dasika,
Matthew R. Guthaus,
Scott A. Mahlke,
Richard B. Brown:
Partitioning Variables across Register Windows to Reduce Spill Code in a Low-Power Processor.
IEEE Trans. Computers 54(8): 998-1012 (2005) |
| 2003 |
|---|
| 2 | EE | Rajiv A. Ravindran,
Robert M. Senger,
Eric D. Marsman,
Ganesh S. Dasika,
Matthew R. Guthaus,
Scott A. Mahlke,
Richard B. Brown:
Increasing the number of effective registers in a low-power processor using a windowed register file.
CASES 2003: 125-136 |
| 1 | EE | Robert M. Senger,
Eric D. Marsman,
Michael S. McCorquodale,
Fadi H. Gebara,
Keith L. Kraver,
Matthew R. Guthaus,
Richard B. Brown:
A 16-bit mixed-signal microsystem with integrated CMOS-MEMS clock reference.
DAC 2003: 520-525 |
