2008 |
12 | EE | Karthick Rajamani,
Charles Lefurgy,
Soraya Ghiasi,
Juan Rubio,
Heather Hanson,
Tom W. Keller:
Power management solutions for computer systems and datacenters.
ISLPED 2008: 135-136 |
2007 |
11 | EE | Heather Hanson,
Stephen W. Keckler,
Karthick Rajamani,
Soraya Ghiasi,
Freeman L. Rawson III,
Juan Rubio:
Power, Performance, and Thermal Management for High-Performance Systems.
IPDPS 2007: 1-8 |
10 | EE | Heather Hanson,
Stephen W. Keckler,
Soraya Ghiasi,
Karthick Rajamani,
Freeman L. Rawson III,
Juan Rubio:
Thermal response to DVFS: analysis with an Intel Pentium M.
ISLPED 2007: 219-224 |
9 | EE | Paul Gratz,
Karthikeyan Sankaralingam,
Heather Hanson,
Premkishore Shivakumar,
Robert G. McDonald,
Stephen W. Keckler,
Doug Burger:
Implementation and Evaluation of a Dynamically Routed Processor Operand Network.
NOCS 2007: 7-17 |
8 | EE | Paul Gratz,
Changkyu Kim,
Karthikeyan Sankaralingam,
Heather Hanson,
Premkishore Shivakumar,
Stephen W. Keckler,
Doug Burger:
On-Chip Interconnection Networks of the TRIPS Chip.
IEEE Micro 27(5): 41-50 (2007) |
2006 |
7 | EE | Karthick Rajamani,
Heather Hanson,
Juan Rubio,
Soraya Ghiasi,
Freeman L. Rawson III:
Application-Aware Power Management.
IISWC 2006: 39-48 |
6 | EE | Karthikeyan Sankaralingam,
Ramadass Nagarajan,
Robert G. McDonald,
Rajagopalan Desikan,
Saurabh Drolia,
M. S. Govindan,
Paul Gratz,
Divya Gulati,
Heather Hanson,
Changkyu Kim,
Haiming Liu,
Nitya Ranganathan,
Simha Sethumadhavan,
Sadia Sharif,
Premkishore Shivakumar,
Stephen W. Keckler,
Doug Burger:
Distributed Microarchitectural Protocols in the TRIPS Prototype Processor.
MICRO 2006: 480-491 |
5 | EE | Madhavi Gopal Valluri,
Lizy Kurian John,
Heather Hanson:
Hybrid-Scheduling for Reduced Energy Consumption in High-Performance Processors.
IEEE Trans. VLSI Syst. 14(9): 1039-1043 (2006) |
2003 |
4 | EE | Karthik Natarajan,
Heather Hanson,
Stephen W. Keckler,
Charles R. Moore,
Doug Burger:
Microprocessor pipeline energy analysis.
ISLPED 2003: 282-287 |
3 | EE | Madhavi Gopal Valluri,
Lizy Kurian John,
Heather Hanson:
Exploiting compiler-generated schedules for energy savings in high-performance processors.
ISLPED 2003: 414-419 |
2 | EE | Heather Hanson,
M. S. Hrishikesh,
Vikas Agarwal,
Stephen W. Keckler,
Doug Burger:
Static energy reduction techniques for microprocessor caches.
IEEE Trans. VLSI Syst. 11(3): 303-313 (2003) |
2001 |
1 | | Heather Hanson,
M. S. Hrishikesh,
Vikas Agarwal,
Stephen W. Keckler,
Doug Burger:
Static Energy Reduction Techniques for Microprocessor Caches.
ICCD 2001: 276-283 |