| 2008 |
|---|
| 12 | EE | Julien Schmaltz,
Jan Tretmans:
On Conformance Testing for Timed Systems.
FORMATS 2008: 250-264 |
| 11 | EE | Dominique Borrione,
Amr Helmy,
Laurence Pierre,
Julien Schmaltz:
Executable formal specification and validation of NoC communication infrastructures.
SBCCI 2008: 176-181 |
| 10 | EE | Julien Schmaltz,
Dominique Borrione:
A functional formalization of on chip communications.
Formal Asp. Comput. 20(3): 241-258 (2008) |
| 2007 |
|---|
| 9 | EE | Julien Schmaltz:
A Formal Model of Clock Domain Crossing and Automated Verification of Time-Triggered Hardware.
FMCAD 2007: 223-230 |
| 8 | EE | Dominique Borrione,
Amr Helmy,
Laurence V. Pierre,
Julien Schmaltz:
A Generic Model for Formally Verifying NoC Communication Architectures: A Case Study.
NOCS 2007: 127-136 |
| 2006 |
|---|
| 7 | EE | Julien Schmaltz,
Dominique Borrione:
Towards a formal theory of on chip communications in the ACL2 logic.
ACL2 2006: 47-56 |
| 6 | EE | Julien Schmaltz:
A Formal Model of Lower System Layers.
FMCAD 2006: 191-192 |
| 5 | EE | Julien Schmaltz,
Dominique Borrione:
Formalizing On Chip Communications in a Functional Style.
Trustworthy Software 2006 |
| 2005 |
|---|
| 4 | EE | Julien Schmaltz,
Dominique Borrione:
A Generic Network on Chip Model.
TPHOLs 2005: 310-325 |
| 2004 |
|---|
| 3 | EE | Julien Schmaltz,
Dominique Borrione:
A Functional Approach to the Formal Specification of Networks on Chip.
FMCAD 2004: 52-66 |
| 2 | EE | Ghiath Al Sammane,
Julien Schmaltz,
Diana Toma,
Pierre Ostier,
Dominique Borrione:
TheoSim: combining symbolic simulation and theorem proving for hardware verification.
SBCCI 2004: 60-65 |
| 2003 |
|---|
| 1 | EE | Ghiath Al Sammane,
Diana Toma,
Julien Schmaltz,
Pierre Ostier,
Dominique Borrione:
Constrained Symbolic Simulation with Mathematica and ACL2.
CHARME 2003: 150-157 |
