2008 |
12 | EE | Miquel Pericàs,
Adrián Cristal,
Francisco J. Cazorla,
Ruden González,
Alexander V. Veidenbaum,
Daniel A. Jiménez,
Mateo Valero:
A Two-Level Load/Store Queue Based on Execution Locality.
ISCA 2008: 25-36 |
11 | EE | Miquel Pericàs,
Ricardo Chaves,
Georgi Gaydadjiev,
Stamatis Vassiliadis,
Mateo Valero:
Vectorized AES Core for High-throughput Secure Environments.
VECPAR 2008: 83-94 |
10 | EE | Miquel Pericàs,
Eduard Ayguadé,
Javier Zalamea,
Josep Llosa,
Mateo Valero:
Power-efficient VLIW design using clustering and widening.
IJES 3(3): 141-149 (2008) |
2007 |
9 | EE | Miquel Pericàs,
Adrián Cristal,
Francisco J. Cazorla,
Ruben Gonzalez,
Daniel A. Jiménez,
Mateo Valero:
A Flexible Heterogeneous Multi-Core Architecture.
PACT 2007: 13-24 |
2006 |
8 | EE | Miquel Pericàs,
Adrián Cristal,
Ruben Gonzalez,
Daniel A. Jiménez,
Mateo Valero:
A decoupled KILO-instruction processor.
HPCA 2006: 53-64 |
2005 |
7 | EE | Rubén González,
Adrián Cristal,
Miquel Pericàs,
Mateo Valero,
Alexander V. Veidenbaum:
An asymmetric clustered processor based on value content.
ICS 2005: 61-70 |
6 | EE | Miquel Pericàs,
Adrián Cristal,
Ruben Gonzalez,
Daniel A. Jiménez:
Chained In-Order/Out-of-Order DoubleCore Architecture.
SBAC-PAD 2005: 209-217 |
5 | EE | Adrián Cristal,
Oliverio J. Santana,
Francisco J. Cazorla,
Marco Galluzzi,
Tanausú Ramírez,
Miquel Pericàs,
Mateo Valero:
Kilo-Instruction Processors: Overcoming the Memory Wall.
IEEE Micro 25(3): 48-57 (2005) |
2004 |
4 | EE | Miquel Pericàs,
Rubén González,
Adrián Cristal,
Alexander V. Veidenbaum,
Mateo Valero:
An Optimized Front-End Physical Register File with Banking and Writeback Filtering.
PACS 2004: 1-14 |
3 | EE | Miquel Pericàs,
Eduard Ayguadé,
Javier Zalamea,
Josep Llosa,
Mateo Valero:
with Wide Functional Units.
SAMOS 2004: 88-97 |
2 | EE | Miquel Pericàs,
Eduard Ayguadé,
Javier Zalamea,
Josep Llosa,
Mateo Valero:
High-performance and low-power VLIW cores for numerical computations.
IJHPCN 1(4): 171-179 (2004) |
2003 |
1 | EE | Miquel Pericàs,
Eduard Ayguadé,
Javier Zalamea,
Josep Llosa,
Mateo Valero:
Power-Performance Trade-Offs in Wide and Clustered VLIW Cores for Numerical Codes.
ISHPC 2003: 113-126 |