| 2008 |
|---|
| 7 | EE | Sanjeev Kumar,
Daehyun Kim,
Mikhail Smelyanskiy,
Yen-Kuang Chen,
Jatin Chhugani,
Christopher J. Hughes,
Changkyu Kim,
Victor W. Lee,
Anthony D. Nguyen:
Atomic Vector Operations on Chip Multiprocessors.
ISCA 2008: 441-452 |
| 2007 |
|---|
| 6 | EE | Mikhail Smelyanskiy,
Victor W. Lee,
Daehyun Kim,
Anthony D. Nguyen,
Pradeep Dubey:
Scaling performance of interior-point method on large-scale chip multiprocessor system.
SC 2007: 22 |
| 2004 |
|---|
| 5 | EE | Mikhail Smelyanskiy,
Scott A. Mahlke,
Edward S. Davidson:
Probabilistic Predicate-Aware Modulo Scheduling.
CGO 2004: 151-162 |
| 2003 |
|---|
| 4 | EE | Kevin Fan,
Nathan Clark,
Michael L. Chu,
K. V. Manjunath,
Rajiv A. Ravindran,
Mikhail Smelyanskiy,
Scott A. Mahlke:
Systematic Register Bypass Customization for Application-Specific Processors.
ASAP 2003: 64-74 |
| 3 | EE | Mikhail Smelyanskiy,
Scott A. Mahlke,
Edward S. Davidson,
Hsien-Hsin S. Lee:
Predicate-Aware Scheduling: A Technique for Reducing Resource Constraints.
CGO 2003: 169-178 |
| 2001 |
|---|
| 2 | EE | Hsien-Hsin S. Lee,
Mikhail Smelyanskiy,
Chris J. Newburn,
Gary S. Tyson:
Stack Value File: Custom Microarchitecture for the Stack.
HPCA 2001: 5-14 |
| 2000 |
|---|
| 1 | EE | Mikhail Smelyanskiy,
Gary S. Tyson,
Edward S. Davidson:
Register Queues: A New Hardware/Software Approach to Efficient Software Pipelining.
IEEE PACT 2000: 3-12 |
