2008 | ||
---|---|---|
44 | EE | Mark Hampton, Krste Asanovic: Compiling for vector-thread architectures. CGO 2008: 205-215 |
43 | EE | Christopher Batten, Ajay Joshi, Jason Orcutt, Anatoly Khilo, Benjamin Moss, Charles Holzwarth, Milos Popovic, Hanqing Li, Henry Smith, Judy Hoyt, Franz Kartner, Rajeev Ram, Vladimir Stojanovic, Krste Asanovic: Building Manycore Processor-to-DRAM Networks with Monolithic Silicon Photonics. Hot Interconnects 2008: 21-30 |
42 | EE | Jae W. Lee, Man Cheuk Ng, Krste Asanovic: Globally-Synchronized Frames for Guaranteed Quality-of-Service in On-Chip Networks. ISCA 2008: 89-100 |
41 | EE | Patrick Schaumont, Krste Asanovic, James C. Hoe: MEMOCODE 2008 Co-Design Contest. MEMOCODE 2008: 151-154 |
40 | EE | Ronny Krashinsky, Christopher Batten, Krste Asanovic: Implementing the scale vector-thread processor. ACM Trans. Design Autom. Electr. Syst. 13(3): (2008) |
2007 | ||
39 | EE | Jae W. Lee, Myron King, Krste Asanovic: Continual hashing for efficient fine-grain state inconsistency detection. ICCD 2007: 33-40 |
38 | EE | John Wawrzynek, David A. Patterson, Mark Oskin, Shih-Lien Lu, Christoforos E. Kozyrakis, James C. Hoe, Derek Chiou, Krste Asanovic: RAMP: Research Accelerator for Multiple Processors. IEEE Micro 27(2): 46-57 (2007) |
37 | EE | Seongmoo Heo, Ronny Krashinsky, Krste Asanovic: Activity-Sensitive Flip-Flop and Latch Selection for Reduced Energy. IEEE Trans. VLSI Syst. 15(9): 1060-1064 (2007) |
2006 | ||
36 | EE | Mark Hampton, Krste Asanovic: Implementing virtual memory in a vector processor with software restart markers. ICS 2006: 135-144 |
35 | EE | Jae W. Lee, Krste Asanovic: METERG: Measurement-Based End-to-End Performance Estimation Technique in QoS-Capable Multiprocessors. IEEE Real Time Technology and Applications Symposium 2006: 135-147 |
34 | EE | Rose F. Liu, Krste Asanovic: Accelerating architectural exploration using canonical instruction segments. ISPASS 2006: 13-24 |
33 | EE | Kenneth C. Barr, Krste Asanovic: Branch trace compression for snapshot-based simulation. ISPASS 2006: 25-36 |
32 | EE | Kenneth C. Barr, Krste Asanovic: Energy-aware lossless data compression. ACM Trans. Comput. Syst. 24(3): 250-291 (2006) |
31 | EE | C. Scott Ananian, Krste Asanovic, Bradley C. Kuszmaul, Charles E. Leiserson, Sean Lie: Unbounded Transactional Memory. IEEE Micro 26(1): 59-69 (2006) |
2005 | ||
30 | EE | C. Scott Ananian, Krste Asanovic, Bradley C. Kuszmaul, Charles E. Leiserson, Sean Lie: Unbounded Transactional Memory. HPCA 2005: 316-327 |
29 | EE | Michael Zhang, Krste Asanovic: Victim Replication: Maximizing Capacity while Hiding Wire Delay in Tiled Chip Multiprocessors. ISCA 2005: 336-345 |
28 | EE | Seongmoo Heo, Krste Asanovic: Replacing global wires with an on-chip network: a power analysis. ISLPED 2005: 369-374 |
27 | EE | Kenneth C. Barr, Heidi Pan, Michael Zhang, Krste Asanovic: Accelerating Multiprocessor Simulation with a Memory Timestamp Record. ISPASS 2005: 66-77 |
26 | EE | Emmett Witchel, Junghwan Rhee, Krste Asanovic: Mondrix: memory isolation for linux using mondriaan memory protection. SOSP 2005: 31-44 |
25 | EE | Jessica H. Tseng, Krste Asanovic: A Speculative Control Scheme for an Energy-Efficient Banked Register Fil. IEEE Trans. Computers 54(6): 741-751 (2005) |
2004 | ||
24 | EE | Ronny Krashinsky, Christopher Batten, Mark Hampton, Steve Gerding, Brian Pharris, Jared Casper, Krste Asanovic: The Vector-Thread Architecture. ISCA 2004: 52-63 |
23 | EE | Seongmoo Heo, Krste Asanovic: Power-optimal pipelining in deep submicron technology. ISLPED 2004: 218-223 |
22 | EE | Christopher Batten, Ronny Krashinsky, Steve Gerding, Krste Asanovic: Cache Refill/Access Decoupling for Vector Machines. MICRO 2004: 331-342 |
21 | EE | Ronny Krashinsky, Christopher Batten, Mark Hampton, Steve Gerding, Brian Pharris, Jared Casper, Krste Asanovic: The Vector-Thread Architecture. IEEE Micro 24(6): 84-90 (2004) |
2003 | ||
20 | Emmett Witchel, Krste Asanovic: Hardware Works, Software Doesn't: Enforcing Modularity with Mondriaan Memory Protection. HotOS 2003: 139-144 | |
19 | EE | Jessica H. Tseng, Krste Asanovic: Banked Multiported Register Files for High-Frequency Superscalar Microprocessors. ISCA 2003: 62-71 |
18 | EE | Seongmoo Heo, Kenneth C. Barr, Krste Asanovic: Reducing power density through activity migration. ISLPED 2003: 217-222 |
17 | EE | Kenneth C. Barr, Krste Asanovic: Energy Aware Lossless Data Compression. MobiSys 2003 |
2002 | ||
16 | EE | Emmett Witchel, Josh Cates, Krste Asanovic: Mondrian memory protection. ASPLOS 2002: 304-316 |
15 | EE | Seongmoo Heo, Kenneth C. Barr, Mark Hampton, Krste Asanovic: Dynamic Fine-Grain Leakage Reduction Using Leakage-Biased Bitlines. ISCA 2002: 137-147 |
14 | EE | Michael Zhang, Krste Asanovic: Fine-grain CAM-tag cache resizing using miss tags. ISLPED 2002: 130-135 |
2001 | ||
13 | EE | Seongmoo Heo, Ronny Krashinsky, Krste Asanovic: Activity-Sensitive Flip-Flop and Latch Selection for Reduced Energy. ARVLSI 2001: 59-74 |
12 | EE | Heidi Pan, Krste Asanovic: Heads and tails: a variable-length instruction format supporting parallel fetch and decode. CASES 2001: 168-175 |
11 | EE | Emmett Witchel, Samuel Larsen, C. Scott Ananian, Krste Asanovic: Direct addressed caches for reduced power consumption. MICRO 2001: 124-133 |
10 | EE | Michael Sung, Ronny Krashinsky, Krste Asanovic: Multithreading decoupled architectures for complexity-effective general purpose computing. SIGARCH Computer Architecture News 29(5): 56-61 (2001) |
2000 | ||
9 | EE | Luis Villa, Michael Zhang, Krste Asanovic: Dynamic zero compression for cache energy reduction. MICRO 2000: 214-220 |
1997 | ||
8 | David A. Patterson, Krste Asanovic, Aaron B. Brown, Richard Fromm, Jason Golbus, Benjamin Gribstad, Kimberly Keeton, Christoforos E. Kozyrakis, David Martin, Stylianos Perissakis, Randi Thomas, Noah Treuhaft, Katherine A. Yelick: Intelligent RAM (IRAM): The Industrial Setting, Applications and Architectures. ICCD 1997: 2-7 | |
7 | Krste Asanovic: A Fast Kohonen Net Implementation for Spert-II. IWANN 1997: 792-800 | |
6 | EE | Jeff Bilmes, Krste Asanovic, Chee-Whye Chin, James Demmel: Optimizing Matrix Multiply Using PHiPAC: A Portable, High-Performance, ANSI C Coding Methodology. International Conference on Supercomputing 1997: 340-347 |
5 | Christoforos E. Kozyrakis, Stylianos Perissakis, David A. Patterson, Thomas E. Anderson, Krste Asanovic, Neal Cardwell, Richard Fromm, Jason Golbus, Benjamin Gribstad, Kimberly Keeton, Randi Thomas, Noah Treuhaft, Katherine A. Yelick: Scalable Processors in the Billion-Transistor Era: IRAM. IEEE Computer 30(9): 75-78 (1997) | |
1996 | ||
4 | John Wawrzynek, Krste Asanovic, Brian Kingsbury, David Johnson, James Beck, Nelson Morgan: Spert-II: A Vector Microprocessor System. IEEE Computer 29(3): 79-86 (1996) | |
1995 | ||
3 | EE | John Wawrzynek, Krste Asanovic, Brian Kingsbury, James Beck, David Johnson, Nelson Morgan: SPERT-II: A Vector Microprocessor System and its Application to Large Problems in Backpropagation Training. NIPS 1995: 619-625 |
1993 | ||
2 | EE | Krste Asanovic, James Beck, Jerry Feldman, Nelson Morgan, John Wawrzynek: Designing A Connectionist Network Supercomputer. Int. J. Neural Syst. 4(4): 317-326 (1993) |
1 | EE | Krste Asanovic, Nelson Morgan, John Wawrzynek: Using simulations of reduced precision arithmetic to design a neuro-microprocessor. VLSI Signal Processing 6(1): 33-44 (1993) |