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Avinash Karanth Kodi

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2009
9EEAvinash Karanth Kodi, Ahmed Louri, Janet Wang: Design of energy-efficient channel buffers with router bypassing for network-on-chips (NoCs). ISQED 2009: 826-832
2008
8EEAvinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri: iDEAL: Inter-router Dual-Function Energy and Area-Efficient Links for Network-on-Chip (NoC) Architectures. ISCA 2008: 241-250
7EEAvinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri: Adaptive Channel Buffers in On-Chip Interconnection Networks - A Power and Performance Analysis. IEEE Trans. Computers 57(9): 1169-1181 (2008)
2007
6EEAvinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri: Design of adaptive communication channel buffers for low-power area-efficient network-on-chip architecture. ANCS 2007: 47-56
5EEAvinash Karanth Kodi, Ahmed Louri: Power-Aware Bandwidth-Reconfigurable Optical Interconnects for High-Performance Computing (HPC) Systems. IPDPS 2007: 1-10
4EEAvinash Karanth Kodi, Ahmed Louri: Performance adaptive power-aware reconfigurable optical interconnects for high-performance computing (HPC) systems. SC 2007: 6
2005
3EEAvinash Karanth Kodi, Ahmed Louri: Design of a High-Speed Optical Interconnect for Scalable Shared-Memory Multiprocessors. IEEE Micro 25(1): 41-49 (2005)
2004
2EEAvinash Karanth Kodi, Ahmed Louri: A Scalable Architecture for Distributed Shared Memory Multiprocessors Using Optical Interconnects. IPDPS 2004
1EEAhmed Louri, Avinash Karanth Kodi: An Optical Interconnection Network and a Modified Snooping Protocol for the Design of Large-Scale Symmetric Multiprocessors (SMPs). IEEE Trans. Parallel Distrib. Syst. 15(12): 1093-1104 (2004)

Coauthor Index

1Ahmed Louri [1] [2] [3] [4] [5] [6] [7] [8] [9]
2Ashwini Sarathy [6] [7] [8]
3Janet Wang [9]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)