Volume 53,
Number 1,
January 2007
- Lian Li, Jingling Xue:
Trace-based leakage energy optimisations at link time.
1-20
Electronic Edition (link) BibTeX
- Chen-Liang Fang, Deron Liang, Fengyi Lin, Chien-Cheng Lin:
Fault tolerant Web Services.
21-38
Electronic Edition (link) BibTeX
- Dongmahn Seo, Joahyoung Lee, Yoon Kim, Changyeol Choi, Manbae Kim, Inbum Jung:
Resource consumption-aware QoS in cluster-based VOD servers.
39-52
Electronic Edition (link) BibTeX
- Venkatesan Muthukumar, Robert J. Bignall, Henry Selvaraj:
An efficient variable partitioning approach for functional decomposition of circuits.
53-67
Electronic Edition (link) BibTeX
Volume 53,
Numbers 2-3,
February-March 2007
Embedded Hardware for Cryptosystems
- Nadia Nedjah, Luiza de Macedo Mourelle:
Embedded cryptographic hardware.
69-71
Electronic Edition (link) BibTeX
- Guerric Meurice de Dormale, Jean-Jacques Quisquater:
High-speed hardware implementations of Elliptic Curve Cryptography: A survey.
72-84
Electronic Edition (link) BibTeX
- Robert Ronan, Colm O'Eigeartaigh, Colin C. Murphy, Michael Scott, Tim Kerins:
Hardware acceleration of the Tate pairing on a genus 2 hyperelliptic curve.
85-98
Electronic Edition (link) BibTeX
- Nadia Nedjah, Luiza de Macedo Mourelle:
Fast hardware for modular exponentiation with efficient exponent pre-processing.
99-108
Electronic Edition (link) BibTeX
- Christophe Nègre:
Efficient parallel multiplier in shifted polynomial basis.
109-116
Electronic Edition (link) BibTeX
- F. Bernard:
Scalable hardware implementing high-radix Montgomery multiplication algorithm.
117-126
Electronic Edition (link) BibTeX
- Ryan Glabb, Laurent Imbert, Graham A. Jullien, Arnaud Tisserand, Nicolas Veyrat-Charvillon:
Multi-mode operator for SHA-2 hash functions.
127-138
Electronic Edition (link) BibTeX
- Konrad J. Kulikowski, Mark G. Karpovsky, Alexander Taubin:
Robust codes and robust, fault-tolerant architectures of the Advanced Encryption Standard.
139-149
Electronic Edition (link) BibTeX
Volume 53,
Number 4,
April 2007
- Tiberiu Seceleanu:
The SegBus platform - architecture and communication mechanisms.
151-169
Electronic Edition (link) BibTeX
- Enric Morancho, José María Llabería, Àngel Olivé:
A comparison of two policies for issuing instructions speculatively.
170-183
Electronic Edition (link) BibTeX
- Khaled Benkrid, Abdsamad Benkrid, S. Belkacemi:
Efficient FPGA hardware development: A multi-language approach.
184-209
Electronic Edition (link) BibTeX
- Ch. Rambabu, I. Chakrabarti:
An efficient immersion-based watershed transform method and its prototype architecture.
210-226
Electronic Edition (link) BibTeX
- Ming-Chien Yang, Jimmy J. M. Tan, Lih-Hsing Hsu:
Highly fault-tolerant cycle embeddings of hypercubes.
227-232
Electronic Edition (link) BibTeX
- F. J. Espino, Montserrat Bóo, Margarita Amor, Javier D. Bruguera:
Hardware support for adaptive tessellation of Bézier surfaces based on local tests.
233-250
Electronic Edition (link) BibTeX
Volume 53,
Numbers 5-6,
May-June 2007
Architectural premises for pervasive computing (ARCS '06)
- Klaus Waldschmidt, Jan Haase, Werner Grass, Bernhard Sick:
Editorial.
251-252
Electronic Edition (link) BibTeX
- Nabil Hasasneh, Ian Bell, Chris R. Jesshope:
Asynchronous arbiter for micro-threaded chip multiprocessors.
253-262
Electronic Edition (link) BibTeX
- Xiaoyong Chen, Douglas L. Maskell:
Supporting multiple-input, multiple-output custom functions in configurable processors.
263-271
Electronic Edition (link) BibTeX
- Woo-Chan Park, Cheong-Ghil Kim, Duk-Ki Yoon, Kil-Whan Lee, Il-San Kim, Tack-Don Han:
A consistency-free memory architecture for sort-last parallel rendering processors.
272-284
Electronic Edition (link) BibTeX
- Jörg-Christian Niemann, Christoph Puttmann, Mario Porrmann, Ulrich Rückert:
Resource efficiency of the GigaNetIC chip multiprocessor architecture.
285-299
Electronic Edition (link) BibTeX
- Hritam Dutta, Frank Hannig, Holger Ruckdeschel, Jürgen Teich:
Efficient control generation for mapping nested loop programs onto processor arrays.
300-309
Electronic Edition (link) BibTeX
- Sunil Kim, Jun-Yong Lee:
A system architecture for high-speed deep packet inspection in signature-based network intrusion prevention.
310-320
Electronic Edition (link) BibTeX
- Ralf Salomon, Frank Sill:
High-speed, low-leakage integrated circuits: An evolutionary algorithm perspective.
321-327
Electronic Edition (link) BibTeX
- Sébastien Lafond, Johan Lilius:
Energy consumption analysis for two embedded Java virtual machines.
328-337
Electronic Edition (link) BibTeX
Volume 53,
Number 7,
July 2007
- Madhura Purnaprajna, Marek Reformat, Witold Pedrycz:
Genetic algorithms for hardware-software partitioning and optimal resource allocation.
339-354
Electronic Edition (link) BibTeX
- Alejandro Martínez, Raúl Martínez, Francisco José Alfaro, José L. Sánchez:
A low-cost strategy to provide full QoS support in Advanced Switching networks.
355-368
Electronic Edition (link) BibTeX
- J. Jyotheswar, Sudipta Mahapatra:
Efficient FPGA implementation of DWT and modified SPIHT for lossless image compression.
369-378
Electronic Edition (link) BibTeX
- Il-Gu Lee, Sok-Kyu Lee:
Efficient automatic gain control algorithm and architecture for wireless LAN receivers.
379-385
Electronic Edition (link) BibTeX
- Bernd Scheuermann, Stefan Janson, Martin Middendorf:
Hardware-oriented ant colony optimization.
386-402
Electronic Edition (link) BibTeX
- Jochen Hollmann, Anders Ardö, Per Stenström:
Effectiveness of caching in a distributed digital library system.
403-416
Electronic Edition (link) BibTeX
- Stylianos Mamagkakis, Alexandros Bartzas, Georgios Pouiklis, David Atienza, Francky Catthoor, Dimitrios Soudris, Antonios Thanailakis:
Systematic methodology for exploration of performance - Energy trade-offs in network applications using Dynamic Data Type refinement.
417-436
Electronic Edition (link) BibTeX
- Jung-Shian Li, Chuan-Gang Liu, Cheng-Yu Huang:
Achieving multipoint-to-multipoint fairness with RCNWA.
437-452
Electronic Edition (link) BibTeX
- Mozammel H. A. Khan, Marek A. Perkowski:
Quantum ternary parallel adder/subtractor with partially-look-ahead carry.
453-464
Electronic Edition (link) BibTeX
Volume 53,
Number 8,
August 2007
Architectures,
Modeling,
and Simulation for Embedded Processors
- Jarmo Takala, Timo D. Hämäläinen, Andy D. Pimentel, Stamatis Vassiliadis:
Editorial.
465
Electronic Edition (link) BibTeX
- Holger Blume, Thorsten von Sydow, Daniel Becker, Tobias G. Noll:
Application of deterministic and stochastic Petri-Nets for performance modeling of NoC architectures.
466-476
Electronic Edition (link) BibTeX
- Erno Salminen, Tero Kangas, Vesa Lahtinen, Jouni Riihimäki, Kimmo Kuusilinna, Timo D. Hämäläinen:
Benchmarking mesh and hierarchical bus networks in system-on-chip context.
477-488
Electronic Edition (link) BibTeX
- Frederik Vandeputte, Lieven Eeckhout, Koen De Bosschere:
Exploiting program phase behavior for energy reduction on multi-configuration processors.
489-500
Electronic Edition (link) BibTeX
- Stefan Farfeleder, Andreas Krall, R. Nigel Horspool:
Ultra fast cycle-accurate compiled emulation of inorder pipelined architectures.
501-510
Electronic Edition (link) BibTeX
- John McAllister, Roger Woods, Scott Fischaber, E. Malins:
Rapid implementation and optimisation of DSP systems on FPGA-centric heterogeneous platforms.
511-523
Electronic Edition (link) BibTeX
- Chunhui Zhang, Yun Long, Fadi J. Kurdahi:
A scalable embedded JPEG 2000 architecture.
524-538
Electronic Edition (link) BibTeX
- Marijn Temmerman, Edgar G. Daylight, Francky Catthoor, Serge Demeyer, Tom Dhaene:
Optimizing data structures at the modeling level in embedded multimedia.
539-549
Electronic Edition (link) BibTeX
Volume 53,
Number 9,
September 2007
- Myungsu Choi, Zachary D. Patitz, Byoungjae Jin, Feng Tao, Nohpill Park, Minsu Choi:
Designing layout-timing independent quantum-dot cellular automata (QCA) circuits by global asynchrony.
551-567
Electronic Edition (link) BibTeX
- Michael G. Lorenz, Luis Mengibar, Enrique San Millán, Luis Entrena:
Low power data processing system with self-reconfigurable architecture.
568-576
Electronic Edition (link) BibTeX
- M. Akkal, Pepe Siy:
A new Mixed Radix Conversion algorithm MRC-II.
577-586
Electronic Edition (link) BibTeX
- Ehsan Atoofian, Amirali Baniasadi:
Speculative trivialization point advancing in high-performance processors.
587-601
Electronic Edition (link) BibTeX
- Rafal Kapela, Andrzej Rybarczyk:
Real-time shape description system based on MPEG-7 descriptors.
602-618
Electronic Edition (link) BibTeX
- Dajin Wang:
A heuristic fault-tolerant routing algorithm in mesh using rectilinear-monotone polygonal fault blocks.
619-628
Electronic Edition (link) BibTeX
- Armando Astarloa, Aitzol Zuloaga, Unai Bidarte, José Luis Martín, Jesús Lázaro, Jaime Jimenez:
Tornado: A self-reconfiguration control system for core-based multiprocessor CSoPCs.
629-643
Electronic Edition (link) BibTeX
- Jeong-Uk Kang, Jinsoo Kim, Chanik Park, Hyoungjun Park, Joonwon Lee:
A multi-channel architecture for high-performance NAND flash-based storage system.
644-658
Electronic Edition (link) BibTeX
- Andrea Santoro, Francesco Quaglia:
Multiprogrammed non-blocking checkpoints in support of optimistic simulation on myrinet clusters.
659-676
Electronic Edition (link) BibTeX
Volume 53,
Number 10,
October 2007
Embedded Computer Systems:
Architectures,
Modeling,
and Simulation
- Timo D. Hämäläinen, Stephan Wong, John Glossner, Stamatis Vassiliadis:
Editorial.
677-678
Electronic Edition (link) BibTeX
- Jari Heikkinen, Jarmo Takala:
Effects of program compression.
679-688
Electronic Edition (link) BibTeX
- Holger Blume, Daniel Becker, Lisa Rotenberg, Martin Botteck, Jörg Brakensiek, Tobias G. Noll:
Hybrid functional- and instruction-level power modeling for embedded and heterogeneous processor architectures.
689-702
Electronic Edition (link) BibTeX
- Rainer Ohlendorf, Thomas Wild, Michael Meitinger, Holm Rauchfuss, Andreas Herkersdorf:
Simulated and measured performance evaluation of RISC-based SoC platforms in network processing applications.
703-718
Electronic Edition (link) BibTeX
- Matteo Monchiero, Gianluca Palermo, Cristina Silvano, Oreste Villa:
Exploration of distributed shared memory architectures for NoC-based multiprocessors.
719-732
Electronic Edition (link) BibTeX
- Giuseppe Ascia, Vincenzo Catania, Alessandro G. Di Nuovo, Maurizio Palesi, Davide Patti:
Efficient design space exploration for application specific systems-on-a-chip.
733-750
Electronic Edition (link) BibTeX
- Thilo Streichert, Michael Glaß, Christian Haubelt, Jürgen Teich:
Design space exploration of reliable networked embedded systems.
751-763
Electronic Edition (link) BibTeX
- Hartwig Jeschke:
Chip size estimation for SOC design space exploration.
764-776
Electronic Edition (link) BibTeX
- Stamatis Vassiliadis, Ioannis Sourdis:
FLUX interconnection networks on demand.
777-793
Electronic Edition (link) BibTeX
Volume 53,
Number 11,
November 2007
- Heikki Orsila, Tero Kangas, Erno Salminen, Timo D. Hämäläinen, Marko Hännikäinen:
Automated memory-aware application distribution for Multi-processor System-on-Chips.
795-815
Electronic Edition (link) BibTeX
- Li Chunlin, Li Layuan:
Optimization decomposition approach for layered QoS scheduling in grid computing.
816-832
Electronic Edition (link) BibTeX
- Kuei-Chung Chang, Tien-Fu Chen:
Efficient segment-based video transcoding proxy for mobile multimedia services.
833-845
Electronic Edition (link) BibTeX
- Ioannis Voyiatzis:
Accumulator-based pseudo-exhaustive two-pattern generation.
846-860
Electronic Edition (link) BibTeX
- Yang Qu, Juha-Pekka Soininen, Jari Nurmi:
Static scheduling techniques for dependent tasks on dynamically reconfigurable devices.
861-876
Electronic Edition (link) BibTeX
- Wenfa Zhan, Huaguo Liang, Feng Shi, Zhengfeng Huang:
Test data compression scheme based on variable-to-fixed-plus-variable-length coding.
877-887
Electronic Edition (link) BibTeX
Volume 53,
Number 12,
December 2007
- Tae-Sun Chung, Hyung-Seok Park:
STAFF: A flash driver algorithm minimizing block erasures.
889-901
Electronic Edition (link) BibTeX
- Huaxi Gu, Jie Zhang, Kun Wang, Zengji Liu, Guochang Kang:
Enhanced fault tolerant routing algorithms using a concept of "balanced ring".
902-912
Electronic Edition (link) BibTeX
- John A. Chandy:
Dual actuator logging disk architecture and modeling.
913-926
Electronic Edition (link) BibTeX
- Wentong Li, Mehran Rezaei, Krishna M. Kavi, Afrin Naz, Philip H. Sweany:
Feasibility of decoupling memory management from the execution pipeline.
927-936
Electronic Edition (link) BibTeX
- Ying-Dar Lin, Kuo-Kun Tseng, Tsern-Huei Lee, Yi-Neng Lin, Chen-Chou Hung, Yuan-Cheng Lai:
A platform-based SoC design and implementation of scalable automaton matching for deep packet inspection.
937-950
Electronic Edition (link) BibTeX
Copyright © Sun May 17 00:11:04 2009
by Michael Ley (ley@uni-trier.de)
