2009 |
9 | EE | Yi-Neng Lin,
Ying-Dar Lin,
Kuo-Kun Tseng,
Yuan-Cheng Lai:
Modeling and analysis of core-centric network processors.
ACM Trans. Embedded Comput. Syst. 8(2): (2009) |
8 | EE | Yi-Neng Lin,
Ying-Dar Lin,
Yuan-Cheng Lai,
Che-Wen Wu:
Highest Urgency First (HUF): A latency and modulation aware bandwidth allocation algorithm for WiMAX base stations.
Computer Communications 32(2): 332-342 (2009) |
2008 |
7 | EE | Yi-Neng Lin,
Ying-Dar Lin,
Yuan-Cheng Lai:
Thread Allocation in Chip Multiprocessor Based Multithreaded Network Processors.
AINA 2008: 718-725 |
6 | EE | Yi-Neng Lin,
Che-Wen Wu,
Ying-Dar Lin,
Yuan-Cheng Lai:
A Latency and Modulation Aware Bandwidth Allocation Algorithm for WiMAX Base Stations.
WCNC 2008: 1408-1413 |
5 | EE | Yi-Neng Lin,
Ying-Dar Lin,
Yuan-Cheng Lai,
Kuo-Kun Tseng:
Modeling and analysis of core-centric network processors.
ACM Trans. Embedded Comput. Syst. 7(4): (2008) |
2007 |
4 | EE | Ying-Dar Lin,
Kuo-Kun Tseng,
Tsern-Huei Lee,
Yi-Neng Lin,
Chen-Chou Hung,
Yuan-Cheng Lai:
A platform-based SoC design and implementation of scalable automaton matching for deep packet inspection.
Journal of Systems Architecture 53(12): 937-950 (2007) |
3 | EE | Yi-Neng Lin,
Yao-Chung Chang,
Ying-Dar Lin,
Yuan-Cheng Lai:
Resource allocation in network processors for network intrusion prevention systems.
Journal of Systems and Software 80(7): 1030-1036 (2007) |
2005 |
2 | EE | Yi-Neng Lin,
Chiuan-Hung Lin,
Ying-Dar Lin,
Yuan-Cheng Lai:
VPN Gateways over Network Processors: Implementation and Evaluation.
IEEE Real-Time and Embedded Technology and Applications Symposium 2005: 480-486 |
2002 |
1 | EE | Ying-Dar Lin,
Yi-Neng Lin,
Shun-Chin Yang,
Yu-Sheng Lin:
DiffServ over Network Processors: Implementation and Evaluation.
Hot Interconnects 2002: 121-126 |