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Henry Selvaraj

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2008
34EEA. R. Nadira Banu Kamal, S. Thamarai Selvi, Henry Selvaraj: Iteration-Free Fractal Coding for Image Compression Using Genetic Algorithm. International Journal of Computational Intelligence and Applications 7(4): 429-446 (2008)
2007
33EEMin Tun, Laxmi Gewali, Henry Selvaraj: Interference Aware Routing in Sensor Network. ITNG 2007: 140-146
32 Dongxin Wen, Ling Wang, Yingtao Jiang, Henry Selvaraj, Xiaozhong Yang: Placement-Directed Behavioral Synthesis Scheme for Simultaneous Scheduling Binding and Partitioning with Resources Operating at Multiple Voltages. I. J. Comput. Appl. 14(2): 92-98 (2007)
31EELing Wang, Yingtao Jiang, Henry Selvaraj: Scheduling and optimal voltage selection with multiple supply voltages under resource constraints. Integration 40(2): 174-182 (2007)
30EEVenkatesan Muthukumar, Robert J. Bignall, Henry Selvaraj: An efficient variable partitioning approach for functional decomposition of circuits. Journal of Systems Architecture 53(1): 53-67 (2007)
2006
29EEHenry Selvaraj, Piotr Sapiecha, Mariusz Rawski, Tadeusz Luba: Functional Decomposition - the Value and Implication for Both Neural Networks and Digital Designing. International Journal of Computational Intelligence and Applications 6(1): 123-138 (2006)
28EED. Selvathi, S. Thamarai Selvi, Henry Selvaraj: Abnormality Detection in Brain MR Images Using Minimum Error Thresholding Method. International Journal of Computational Intelligence and Applications 6(2): 177-191 (2006)
27EEMariusz Rawski, Henry Selvaraj, Tadeusz Luba, Piotr Szotkowski: Multilevel Synthesis of Finite State Machines Based on Symbolic Functional Decomposition. International Journal of Computational Intelligence and Applications 6(2): 257-271 (2006)
26EEHenry Selvaraj, S. Thamarai Selvi, D. Selvathi, R. Ramkumar: Support Vector Machine Based Automatic Classification of Human Brain Using MR Image Features. International Journal of Computational Intelligence and Applications 6(3): 357-370 (2006)
25EELing Wang, Yingtao Jiang, Henry Selvaraj: Scheduling and Partitioning Schemes for Low Power Designs Using Multiple Supply Voltages. The Journal of Supercomputing 35(1): 93-113 (2006)
2005
24EEMariusz Rawski, Pawel Tomaszewicz, Henry Selvaraj, Tadeusz Luba: Efficient Implementation of Digital Filters with Use of Advanced Synthesis Methods Targeted FPGA Architectures. DSD 2005: 460-466
23EEHenry Selvaraj, Pawel Tomaszewicz, Mariusz Rawski, Tadeusz Luba: Efficient Application of Modern Logic Synthesis in FPGA-Based Designing of Information and Signal Processing Systems. ITCC (2) 2005: 22-27
22EEHenry Selvaraj, Lech Józwiak: Reconfigurable embedded systems: Synthesis, design and application. Journal of Systems Architecture 51(6-7): 347-349 (2005)
21EEVenkatesan Muthukumar, Bharath Radhakrishnan, Henry Selvaraj: Multiple voltage and frequency scheduling for power minimization. Journal of Systems Architecture 51(6-7): 382-394 (2005)
20EEMariusz Rawski, Henry Selvaraj, Tadeusz Luba: An application of functional decomposition in ROM-based FSM implementation in FPGA devices. Journal of Systems Architecture 51(6-7): 424-434 (2005)
2004
19EEMariusz Rawski, Henry Selvaraj, Pawel Morawiecki: Efficient Method of Input Variable Partitioning in Functional Decomposition Based on Evolutionary Algorithms. DSD 2004: 136-143
18EEJianhong Li, Laxmi Gewali, Henry Selvaraj, Muthukumar Venkatesan: Hybrid Greedy/Face Routing for Ad-Hoc Sensor Network. DSD 2004: 574-578
17 Ling Wang, Yingtao Jiang, Henry Selvaraj: Synthesis scheme for low power designs with multiple supply voltages by tabu search. ISCAS (5) 2004: 261-264
16EELing Wang, Yingtao Jiang, Henry Selvaraj: Synthesis Scheme for Low Power Designs with Multiple Supply Voltages by Heuristic Algorithms. ITCC (2) 2004: 829-833
15 Piotr Sapiecha, Henry Selvaraj, Jaroslaw Stanczak, Krzysztof Sep, Tadeusz Luba: A Hybrid Approach to a Classification Problem. Intelligent Information Systems 2004: 99-106
2003
14EEMariusz Rawski, Henry Selvaraj, Tadeusz Luba: An Application of Functional Decomposition in ROM-Based FSM Implementation in FPGA Devices. DSD 2003: 104-111
13EELing Wang, Henry Selvaraj: A Scheduling and Partitioning Scheme for Low Power Circuit Operating at Multiple Voltages. DSD 2003: 144-147
12EEMichal Pleban, Hubert Niewiadomski, Piotr Buciak, Henry Selvaraj, Piotr Sapiecha, Tadeusz Luba: NOAH, a tool for argument reduction, serial and parallel decomposition of decision tables. DSD 2003: 248-254
11 Ling Wang, Yingtao Jiang, Henry Selvaraj: Scheduling and Optimal Voltage Selection with Multiple Supply Voltages under Resource Constraints. VLSI 2003: 272-278
10EEMuthukumar Venkatesan, Henry Selvaraj: Comparison of Heuristic Algorithms for Variable Partitioning in Circuit Implementation. VLSI Design 2003: 51-57
2002
9EELing Wang, Henry Selvaraj: Performance Driven Circuit Clustering and Partitioning. ITCC 2002: 352-354
8EEHenry Selvaraj, Mariusz Rawski, Tadeusz Luba: FSM Implementation in Embedded Memory Blocks of Programmable Logic Devices Using Functional Decomposition. ITCC 2002: 355-360
2001
7EEMuthukumar Venkatesan, Robert J. Bignall, Henry Selvaraj: A variable partition approach for disjoint decomposition. ISCAS (5) 2001: 157-162
6 Henry Selvaraj, Piotr Sapiecha, Tadeusz Luba: Functional Decomposition and Its Applications in Machine Learning and Neural Networks. International Journal of Computational Intelligence and Applications 1(3): 259-271 (2001)
2000
5EEMuthukumar Venkatesan, Robert J. Bignall, Henry Selvaraj: An Improved Column Compatibility Approach for Partition Based Functional Decomposition. EUROMICRO 2000: 1067-
4EEHenry Selvaraj, B. Li: A Parameter to Measure the Efficiency of FPGA Based Logic Synthesis Tools. EUROMICRO 2000: 1212-
3EEPiotr Sapiecha, Henry Selvaraj, Michal Pleban: Decomposition of Boolean Relations and Functions in Logic Synthesis and Data Analysis. Rough Sets and Current Trends in Computing 2000: 487-494
1998
2EEHenry Selvaraj, Muthukumar Venkatesan: A Reconfiguarable Printed Character Recognition System Using a Logic Synthesis Tool. EUROMICRO 1998: 10024-
1EEHenry Selvaraj, Miroslawa Nowicka, Tadeusz Luba: Decomposition Strategies and their Performance in Fpga-Based Technology Mapping. VLSI Design 1998: 388-393

Coauthor Index

1Robert J. Bignall [5] [7] [30]
2Piotr Buciak [12]
3Laxmi Gewali [18] [33]
4Yingtao Jiang [11] [16] [17] [25] [31] [32]
5Lech Józwiak [22]
6A. R. Nadira Banu Kamal [34]
7B. Li [4]
8Jianhong Li [18]
9Tadeusz Luba [1] [6] [8] [12] [14] [15] [20] [23] [24] [27] [29]
10Pawel Morawiecki [19]
11Venkatesan Muthukumar (Muthukumar Venkatesan) [2] [5] [7] [10] [18] [21] [30]
12Hubert Niewiadomski [12]
13Miroslawa Nowicka [1]
14Michal Pleban [3] [12]
15Bharath Radhakrishnan [21]
16R. Ramkumar [26]
17Mariusz Rawski [8] [14] [19] [20] [23] [24] [27] [29]
18Piotr Sapiecha [3] [6] [12] [15] [29]
19D. Selvathi [26] [28]
20S. Thamarai Selvi [26] [28] [34]
21Krzysztof Sep [15]
22Jaroslaw Stanczak [15]
23Piotr Szotkowski [27]
24Pawel Tomaszewicz [23] [24]
25Min Tun [33]
26Ling Wang [9] [11] [13] [16] [17] [25] [31] [32]
27Dongxin Wen [32]
28Xiaozhong Yang [32]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)