2008 |
11 | EE | Mozammel H. A. Khan,
Nafisa K. Siddika,
Marek A. Perkowski:
Minimization of Quaternary Galois Field Sum of Products Expression for Multi-Output Quaternary Logic Function Using Quaternary Galois Field Decision Diagram.
ISMVL 2008: 125-130 |
10 | EE | Mozammel H. A. Khan:
Reversible Realization of Quaternary Decoder, Multiplexer, and Demultiplexer Circuits.
ISMVL 2008: 208-213 |
9 | EE | Mozammel H. A. Khan:
Synthesis of quaternary reversible/quantum comparators.
Journal of Systems Architecture - Embedded Systems Design 54(10): 977-982 (2008) |
8 | EE | Mozammel H. A. Khan:
A recursive method for synthesizing quantum/reversible quaternary parallel adder/subtractor with look-ahead carry.
Journal of Systems Architecture - Embedded Systems Design 54(12): 1113-1121 (2008) |
2007 |
7 | EE | Mozammel H. A. Khan,
Marek A. Perkowski:
GF(4) Based Synthesis of Quaternary Reversible/Quantum Logic Circuits.
ISMVL 2007: 11 |
6 | EE | Asif I. Khan,
Nadia Nusrat,
Samira M. Khan,
Masud Hasan,
Mozammel H. A. Khan:
Quantum Realization of Some Ternary Circuits Using Muthukrishnan-Stroud Gates.
ISMVL 2007: 20 |
5 | EE | Mozammel H. A. Khan,
Marek A. Perkowski:
Quantum ternary parallel adder/subtractor with partially-look-ahead carry.
Journal of Systems Architecture 53(7): 453-464 (2007) |
2006 |
4 | | Mozammel H. A. Khan:
Design of Reversible/Quantum Ternary Multiplexer and Demultiplexer.
Engineering Letters 13(2): 65-69 (2006) |
2004 |
3 | EE | Mozammel H. A. Khan,
Marek A. Perkowski,
Mujibur R. Khan:
Ternary Galois Field Expansions for Reversible Logic and Kronecker Decision Diagrams for Ternary GFSOP Minimization.
ISMVL 2004: 58-67 |
2 | EE | Pawel Kerntopf,
Marek A. Perkowski,
Mozammel H. A. Khan:
On Universality of General Reversible Multiple-Valued Logic Gates.
ISMVL 2004: 68-73 |
2003 |
1 | EE | Mozammel H. A. Khan,
Marek A. Perkowski,
Pawel Kerntopf:
Multi-Output Galois Field Sum of Products Synthesis with New Quantum Cascades.
ISMVL 2003: 146-153 |