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Michael Meitinger

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2008
7EEMichael Meitinger, Rainer Ohlendorf, Thomas Wild, Andreas Herkersdorf: A Hardware Packet Re-Sequencer Unit for Network Processors. ARCS 2008: 85-97
6EEThilo Pionteck, Roman Koch, Carsten Albrecht, Erik Maehle, Michael Meitinger, Rainer Ohlendorf, Thomas Wild, Andreas Herkersdorf: Network processors. FPL 2008: 352
5EERainer Ohlendorf, Michael Meitinger, Thomas Wild, Andreas Herkersdorf: A Processing Path Dispatcher in Network Processor MPSoCs. IEEE Trans. VLSI Syst. 16(10): 1335-1345 (2008)
2007
4EEMichael Meitinger, Rainer Ohlendorf, Thomas Wild, Andreas Herkersdorf: A Programmable Stream Processing Engine for Packet Manipulation in Network Processors. ISVLSI 2007: 259-264
3EERainer Ohlendorf, Thomas Wild, Michael Meitinger, Holm Rauchfuss, Andreas Herkersdorf: Simulated and measured performance evaluation of RISC-based SoC platforms in network processing applications. Journal of Systems Architecture 53(10): 703-718 (2007)
2006
2EEAndreas Herkersdorf, Christopher Claus, Michael Meitinger, Rainer Ohlendorf, Thomas Wild: Reconfigurable Processing Units vs. Reconfigurable Interconnects. Dynamically Reconfigurable Architectures 2006
1EERainer Ohlendorf, Thomas Wild, Michael Meitinger, Holm Rauchfuss, Andreas Herkersdorf: Performance Evaluation of RISC-based SoC Platforms in Network Processing Applications. ICSAMOS 2006: 152-159

Coauthor Index

1Carsten Albrecht [6]
2Christopher Claus [2]
3Andreas Herkersdorf [1] [2] [3] [4] [5] [6] [7]
4Roman Koch [6]
5Erik Maehle [6]
6Rainer Ohlendorf [1] [2] [3] [4] [5] [6] [7]
7Thilo Pionteck [6]
8Holm Rauchfuss [1] [3]
9Thomas Wild [1] [2] [3] [4] [5] [6] [7]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)