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Holger Ruckdeschel

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2008
4EEFrank Hannig, Holger Ruckdeschel, Hritam Dutta, Jürgen Teich: PARO: Synthesis of Hardware Accelerators for Multi-Dimensional Dataflow-Intensive Applications. ARC 2008: 284-289
2007
3 Jürgen Teich, Frank Hannig, Holger Ruckdeschel, Hritam Dutta, Dmitrij Kissler, Andrej Stravet: A Unified Retargetable Design Methodology for Dedicated and Re-Programmable Multiprocessor Arrays: Case Study and Quantitative Evaluation. ERSA 2007: 14-24
2EEHritam Dutta, Frank Hannig, Holger Ruckdeschel, Jürgen Teich: Efficient control generation for mapping nested loop programs onto processor arrays. Journal of Systems Architecture 53(5-6): 300-309 (2007)
2005
1EEHolger Ruckdeschel, Hritam Dutta, Frank Hannig, Jürgen Teich: Automatic FIR Filter Generation for FPGAs. SAMOS 2005: 51-61

Coauthor Index

1Hritam Dutta [1] [2] [3] [4]
2Frank Hannig [1] [2] [3] [4]
3Dmitrij Kissler [3]
4Andrej Stravet [3]
5Jürgen Teich [1] [2] [3] [4]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)