dblp.uni-trier.dewww.uni-trier.de

Hartwig Jeschke

List of publications from the DBLP Bibliography Server - FAQ
Coauthor Index - Ask others: ACM DL/Guide - CiteSeer - CSB - Google - MSN - Yahoo

2008
5EEHartwig Jeschke: Efficiency measures for SOC concepts. Journal of Systems Architecture - Embedded Systems Design 54(11): 1039-1045 (2008)
2007
4EEHartwig Jeschke: Efficiency Measures for Multimedia SOCs. SAMOS 2007: 190-199
3EEHartwig Jeschke: Chip size estimation for SOC design space exploration. Journal of Systems Architecture 53(10): 764-776 (2007)
2006
2EEHartwig Jeschke: Design Space Expoloration Chip Size Estimation for SOC Design Space Exploration. ICSAMOS 2006: 56-62
1993
1EEKlaus Gaedke, Hartwig Jeschke, Peter Pirsch: A VLSI based MIMD architecture of a multiprocessor system for real-time video processing applications. VLSI Signal Processing 5(2-3): 159-169 (1993)

Coauthor Index

1Klaus Gaedke [1]
2Peter Pirsch [1]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)