2008 |
19 | EE | Won-Jong Lee,
Vason P. Srini,
Woo-Chan Park,
Shigeru Muraki,
Tack-Don Han:
An Effective Load Balancing Scheme for 3D Texture-Based Sort-Last Parallel Volume Rendering on GPU Clusters.
IEICE Transactions 91-D(3): 846-856 (2008) |
2007 |
18 | EE | Seung-Gi Lee,
Woo-Chan Park,
Won-Jong Lee,
Sung-Bong Yang,
Tack-Don Han:
An Effective Bump Mapping Hardware Architecture Using Polar Coordinate System.
J. Inf. Sci. Eng. 23(2): 569-588 (2007) |
17 | EE | Woo-Chan Park,
Cheong-Ghil Kim,
Duk-Ki Yoon,
Kil-Whan Lee,
Il-San Kim,
Tack-Don Han:
A consistency-free memory architecture for sort-last parallel rendering processors.
Journal of Systems Architecture 53(5-6): 272-284 (2007) |
2006 |
16 | EE | Woo-Chan Park,
Duk-Ki Yoon,
Kil-Whan Lee,
Il-San Kim,
Kyung-Su Kim,
Won-Jong Lee,
Tack-Don Han,
Sung-Bong Yang:
A Processor Architecture with Effective Memory System for Sort-Last Parallel Rendering.
ARCS 2006: 160-175 |
15 | EE | Moon-Hee Choi,
Woo-Chan Park,
Francis Neelamkavil,
Tack-Don Han,
Shin-Dug Kim:
An Effective Visibility Culling Method Based on Cache Block.
IEEE Trans. Computers 55(8): 1024-1032 (2006) |
2005 |
14 | EE | Byung-Uck Kim,
Kyoung-Wha Kim,
Woo-Chan Park,
Sung-Bong Yang,
Tack-Don Han:
A Simple and Efficient Triangle Strip Filtering Algorithm.
J. Inf. Sci. Eng. 21(6): 1277-1288 (2005) |
13 | EE | Kil-Whan Lee,
Woo-Chan Park,
Il-San Kim,
Tack-Don Han:
A pixel cache architecture with selective placement scheme based on z-test result.
Microprocessors and Microsystems 29(1): 41-46 (2005) |
2004 |
12 | EE | Byung-Uck Kim,
Woo-Chan Park,
Sung-Bong Yang,
Tack-Don Han:
A Cost-Effective Supersampling for Full Scene AntiAliasing.
Asia-Pacific Computer Systems Architecture Conference 2004: 271-281 |
11 | EE | Woo-Chan Park,
Tack-Don Han,
Sung-Bong Yang:
Order Independent Transparency for Image Composition Parallel Rendering Machines.
Asia-Pacific Computer Systems Architecture Conference 2004: 449-460 |
10 | EE | Woo-Chan Park,
Tack-Don Han,
Sung-Bong Yang:
A Floating Point Divider Performing IEEE Rounding and Quotient Conversion in Parallel.
Asia-Pacific Computer Systems Architecture Conference 2004: 568-581 |
9 | EE | Won-Jong Lee,
Woo-Chan Park,
Jung-Woo Kim,
Tack-Don Han,
Sung-Bong Yang,
Francis Neelamkavil:
A Bandwidth Reduction Scheme for 3D Texture-Based Volume Rendering on Commodity Graphics Hardware.
ICCSA (2) 2004: 741-750 |
8 | EE | Jong-Chul Jeong,
Woo-Chan Park,
Woong Jeong,
Tack-Don Han,
Moon Key Lee:
A Cost-Effective Pipelined Divider with a Small Lookup Table.
IEEE Trans. Computers 53(4): 483-489 (2004) |
2003 |
7 | EE | Woo-Chan Park,
Kil-Whan Lee,
Il-San Kim,
Tack-Don Han,
Sung-Bong Yang:
An Effective Pixel Rasterization Pipeline Architecture for 3D Rendering Processors.
IEEE Trans. Computers 52(11): 1501-1508 (2003) |
6 | EE | Cheol-Ho Jeong,
Woo-Chan Park,
Tack-Don Han,
Sung-Bong Yang,
Moon Key Lee:
An effective out-of-order execution control scheme for an embedded floating point coprocessor.
Microprocessors and Microsystems 27(4): 171-180 (2003) |
2002 |
5 | EE | Woo-Chan Park,
Kil-Whan Lee,
Il-San Kim,
Tack-Don Han,
Sung-Bong Yang:
A Mid-Texturing Pixel Rasterization Pipeline Architecture for 3D Rendering Processors.
ASAP 2002: 173- |
4 | EE | Won-Jong Lee,
Hyung-Rae Kim,
Woo-Chan Park,
Jung-Woo Kim,
Tack-Don Han,
Sung-Bong Yang:
A New Bandwidth Reduction Method for Distributed Rendering Systems.
EurAsia-ICT 2002: 387-394 |
3 | | Moon-Hee Choi,
Woo-Chan Park,
Eun-Ji Lee,
Shin-Dug Kim,
Tack-Don Han:
A Pipelined Tiling-Traversal Unit for High Performance 3D Rendering Processor.
PDPTA 2002: 1926-1931 |
2 | | Eun-Ji Lee,
Moon-Hee Choi,
Woo-Chan Park,
Shin-Dug Kim,
Tack-Don Han:
Design of a Single Pass Rendering Pipeline for Occlusion Culling.
PDPTA 2002: 1932-1937 |
2001 |
1 | EE | Cheol-Ho Jeong,
Woo-Chan Park,
Tack-Don Han,
Moon Key Lee,
Sang-Woo Kim:
In-Order Issue Out-of-Order Execution Floating-Point Coprocessor for CalmRISC32.
IEEE Symposium on Computer Arithmetic 2001: 195- |