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Giuseppe Ascia

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2008
36EEGiuseppe Ascia, Vincenzo Catania, Maurizio Palesi, Davide Patti: Implementation and Analysis of a New Selection Strategy for Adaptive Routing in Networks-on-Chip. IEEE Trans. Computers 57(6): 809-820 (2008)
2007
35EEGiuseppe Ascia, Vincenzo Catania, Alessandro G. Di Nuovo, Maurizio Palesi, Davide Patti: Efficient design space exploration for application specific systems-on-a-chip. Journal of Systems Architecture 53(10): 733-750 (2007)
2006
34EEAlessandro G. Di Nuovo, Maurizio Palesi, Davide Patti, Giuseppe Ascia, Vincenzo Catania: Fuzzy decision making in embedded system design. CODES+ISSS 2006: 223-228
33EEGiuseppe Ascia, Vincenzo Catania, Maurizio Palesi, Davide Patti: Neighbors-on-Path: A New Selection Strategy for On-Chip Networks. ESTImedia 2006: 79-84
32EEGiuseppe Ascia, Vincenzo Catania, Alessandro G. Di Nuovo, Maurizio Palesi, Davide Patti: An Efficent Hierachical Fuzzy Approach for System Level System-on-a-Chip Design. ICSAMOS 2006: 115-122
31EEGiuseppe Ascia, Vincenzo Catania, Daniela Panno: An integrated fuzzy-GA approach for buffer management. IEEE T. Fuzzy Systems 14(4): 528-541 (2006)
30EEGiuseppe Ascia, Vincenzo Catania, Maurizio Palesi: A Multi-objective Genetic Approach to Mapping Problem on Network-on-Chip. J. UCS 12(4): 370-394 (2006)
2005
29EEGiuseppe Ascia, Vincenzo Catania, Maurizio Palesi, Davide Patti: Exploring Design Space of VLIW Architectures. ASAP 2005: 86-91
28EEGiuseppe Ascia, Vincenzo Catania, Maurizio Palesi, Davide Patti: A system-level framework for evaluating area/performance/power trade-offs of VLIW-based embedded systems. ASP-DAC 2005: 940-943
27EEGiuseppe Ascia, Vincenzo Catania, Maurizio Palesi: An evolutionary approach to network-on-chip mapping problem. Congress on Evolutionary Computation 2005: 112-119
26EEGiuseppe Ascia, Vincenzo Catania, Maurizio Palesi, Davide Patti: Hyperblock formation: a power/energy perspective for high performance VLIW architectures. ISCAS (4) 2005: 4090-4093
25EEGiuseppe Ascia, Vincenzo Catania, Maurizio Palesi: A multiobjective genetic approach for system-level exploration in parameterized systems-on-a-chip. IEEE Trans. on CAD of Integrated Circuits and Systems 24(4): 635-645 (2005)
24EEGiuseppe Ascia, Vincenzo Catania, Daniela Panno: An evolutionary management scheme in high-performance packet switches. IEEE/ACM Trans. Netw. 13(2): 262-275 (2005)
2004
23EEGiuseppe Ascia, Vincenzo Catania, Maurizio Palesi: Multi-objective mapping for mesh-based NoC architectures. CODES+ISSS 2004: 182-187
22EEGiuseppe Ascia, Vincenzo Catania, Maurizio Palesi, Davide Patti: Multi-objective Optimization of a Parameterized VLIW Architecture. Evolvable Hardware 2004: 191-198
21EEGiuseppe Ascia, Vincenzo Catania, Maurizio Palesi: A GA-based design space exploration framework for parameterized system-on-a-chip platforms. IEEE Trans. Evolutionary Computation 8(4): 329-346 (2004)
2003
20 Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi, Davide Patti: EPIC-Explorer: A Parameterized VLIW-based Platform Framework for Design Space Exploration. ESTImedia 2003: 65-72
19EEGiuseppe Ascia, Vincenzo Catania, Maurizio Palesi, Antonio Parlato: An evolutionary approach for reducing the switching activity in address buses. IEEE Congress on Evolutionary Computation (1) 2003: 107-114
18EEGiuseppe Ascia, Vincenzo Catania, Maurizio Palesi, Antonio Parlato: An evolutionary approach for reducing the energy in address buses. ISICT 2003: 76-81
17EEGiuseppe Ascia, Vincenzo Catania, Maurizio Palesi: A Genetic Bus Encoding Technique for Power Optimization of Embedded Systems. PATMOS 2003: 21-30
16 Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi: A Genetic Approach To Bus Encoding. VLSI-SOC 2003: 426-431
2002
15EEGiuseppe Ascia, Vincenzo Catania, Daniela Panno: An efficient buffer management policy based on an integrated Fuzzy-GA approach. INFOCOM 2002
14EEGiuseppe Ascia, Vincenzo Catania, Maurizio Palesi: A Framework for Design Space Exploration of Parameterized VLSI Systems. VLSI Design 2002: 245-250
2001
13EEGiuseppe Ascia, Vincenzo Catania, Maurizio Palesi: Parameterised system design based on genetic algorithms. CODES 2001: 177-182
12 Giuseppe Ascia, Vincenzo Catania: A General Purpose Processor Oriented Fuzzy Reasoning. FUZZ-IEEE 2001: 352-355
11EEGiuseppe Ascia, Vincenzo Catania, Giuseppe Ficili, Daniela Panno: A Fuzzy Buffer Management Scheme For ATM and IP Networks. INFOCOM 2001: 1539-1547
10EEGiuseppe Ascia, Vincenzo Catania, Daniela Panno: An adaptive fuzzy threshold scheme for high performance shared-memory switches. SAC 2001: 456-461
9 Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi: An Evolutionary Approach for Pareto-optimal Configurations in SOC Platforms. VLSI-SOC 2001: 157-168
8EEGiuseppe Ascia, Vincenzo Catania, Daniela Panno: An efficient fuzzy system for traffic management in high-speed packet-switched networks. Soft Comput. 5(4): 247-256 (2001)
1999
7 Giuseppe Ascia, Vincenzo Catania: An Optimized Parallel RISC Processor for Fuzzy Computing. Applied Informatics 1999: 454-456
1998
6EEGiuseppe Ascia, Vincenzo Catania: A Framework for a Parallel Architecture Dedicated to Soft Computing. VLSI Design 1998: 318-321
1997
5EEGiuseppe Ascia, Vincenzo Catania, Giuseppe Ficili: Design of a VLSI Hardware PET Decoder. VLSI Design 1997: 253-256
1996
4 Giuseppe Ascia, Vincenzo Catania, Antonio Puliafito, Lorenzo Vita: A Reconfigurable Parallel Architecture for a Fuzzy Processor. Inf. Sci. 88(1-4): 299-315 (1996)
1995
3EEGiuseppe Ascia, Giuseppe Ficili, Daniela Panno: Design of a VLSI fuzzy processor for ATM traffic sources management. LCN 1995: 62-
2EEGiuseppe Ascia, Vincenzo Catania: Design of a VLSI parallel processor for fuzzy computing. VLSI Design 1995: 315-320
1 Vincenzo Catania, Giuseppe Ascia: A VLSI Parallel Architecture for Fuzzy Expert Systems. IJPRAI 9(2): 421-447 (1995)

Coauthor Index

1Vincenzo Catania [1] [2] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27] [28] [29] [30] [31] [32] [33] [34] [35] [36]
2Giuseppe Ficili [3] [5] [11]
3Alessandro G. Di Nuovo [32] [34] [35]
4Maurizio Palesi [9] [13] [14] [16] [17] [18] [19] [20] [21] [22] [23] [25] [26] [27] [28] [29] [30] [32] [33] [34] [35] [36]
5Daniela Panno [3] [8] [10] [11] [15] [24] [31]
6Antonio Parlato [18] [19]
7Davide Patti [20] [22] [26] [28] [29] [32] [33] [34] [35] [36]
8Antonio Puliafito [4]
9Lorenzo Vita [4]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)