2009 |
17 | EE | Perry H. Wang,
Jamison D. Collins,
Christopher T. Weaver,
Blliappa Kuttanna,
Shahram Salamian,
Gautham N. Chinya,
Ethan Schuchman,
Oliver Schilling,
Thorsten Doil,
Sebastian Steibl,
Hong Wang:
Intel® atomTM processor core made FPGA-synthesizable.
FPGA 2009: 209-218 |
2008 |
16 | EE | Michael D. Linderman,
Jamison D. Collins,
Hong Wang,
Teresa H. Y. Meng:
Merge: a programming model for heterogeneous multi-core systems.
ASPLOS 2008: 287-296 |
15 | EE | Omid Azizi,
Jamison D. Collins,
Dinesh Patil,
Hong Wang,
Mark Horowitz:
Processor Performance Modeling using Symbolic Simulation.
ISPASS 2008: 127-138 |
14 | EE | Henry Wong,
Anne Bracy,
Ethan Schuchman,
Tor M. Aamodt,
Jamison D. Collins,
Perry H. Wang,
Gautham N. Chinya,
Ankur Khandelwal Groen,
Hong Jiang,
Hong Wang:
Pangaea: a tightly-coupled IA32 heterogeneous chip multiprocessor.
PACT 2008: 52-61 |
2007 |
13 | EE | Perry H. Wang,
Jamison D. Collins,
Gautham N. Chinya,
Bernard Lint,
Asit Mallick,
Koichi Yamada,
Hong Wang:
Sequencer virtualization.
ICS 2007: 148-157 |
12 | EE | Perry H. Wang,
Jamison D. Collins,
Gautham N. Chinya,
Hong Jiang,
Xinmin Tian,
Milind Girkar,
Nick Y. Yang,
Guei-Yuan Lueh,
Hong Wang:
EXOCHI: architecture and programming environment for a heterogeneous multi-core multithreaded system.
PLDI 2007: 156-166 |
2006 |
11 | EE | Richard A. Hankins,
Gautham N. Chinya,
Jamison D. Collins,
Perry H. Wang,
Ryan Rakvic,
Hong Wang,
John Paul Shen:
Multiple Instruction Stream Processor.
ISCA 2006: 114-127 |
2004 |
10 | EE | Perry H. Wang,
Jamison D. Collins,
Hong Wang,
Dongkeun Kim,
Bill Greene,
Kai-Ming Chan,
Aamir B. Yunus,
Terry Sych,
Stephen F. Moore,
John Paul Shen:
Helper threads via virtual multithreading on an experimental itanium® 2 processor-based platform.
ASPLOS 2004: 144-155 |
9 | EE | Jamison D. Collins,
Dean M. Tullsen:
Clustered Multithreaded Architectures - Pursuing both IPC and Cycle Time.
IPDPS 2004 |
8 | EE | Jamison D. Collins,
Dean M. Tullsen,
Hong Wang:
Control Flow Optimization Via Dynamic Reconvergence Prediction.
MICRO 2004: 129-140 |
7 | EE | Perry H. Wang,
Jamison D. Collins,
Hong Wang,
Dongkeun Kim,
Bill Greene,
Kai-Ming Chan,
Aamir B. Yunus,
Terry Sych,
Stephen F. Moore,
John Paul Shen:
Helper Threads via Virtual Multithreading.
IEEE Micro 24(6): 74-82 (2004) |
2002 |
6 | EE | Perry H. Wang,
Hong Wang,
Jamison D. Collins,
Ed Grochowski,
Ralph-Michael Kling,
John Paul Shen:
Memory Latency-Tolerance Approaches for Itanium Processors: Out-of-Order Execution vs. Speculative Precomputation.
HPCA 2002: 187-196 |
5 | EE | Jamison D. Collins,
Suleyman Sair,
Brad Calder,
Dean M. Tullsen:
Pointer cache assisted prefetching.
MICRO 2002: 62-73 |
2001 |
4 | EE | Jamison D. Collins,
Hong Wang,
Dean M. Tullsen,
Christopher J. Hughes,
Yong-Fong Lee,
Daniel M. Lavery,
John Paul Shen:
Speculative precomputation: long-range prefetching of delinquent loads.
ISCA 2001: 14-25 |
3 | EE | Jamison D. Collins,
Dean M. Tullsen,
Hong Wang,
John Paul Shen:
Dynamic speculative precomputation.
MICRO 2001: 306-317 |
2 | EE | Jamison D. Collins,
Dean M. Tullsen:
Runtime identification of cache conflict misses: The adaptive miss buffer.
ACM Trans. Comput. Syst. 19(4): 413-439 (2001) |
1999 |
1 | EE | Jamison D. Collins,
Dean M. Tullsen:
Hardware Identification of Cache Conflict Misses.
MICRO 1999: 126-135 |