22. ISCA 1995:
Santa Margherita Ligure,
Italy
Proceedings of the 22nd Annual International Symposium on Computer Architecture,
ISCA '95,
June 22-24,
1995,
Santa Margherita Ligure,
Italy.
Multiprocessors and Applications
- Anant Agarwal, Ricardo Bianchini, David Chaiken, Kirk L. Johnson, David A. Kranz, John Kubiatowicz, Beng-Hong Lim, Kenneth Mackenzie, Donald Yeung:
The MIT Alewife Machine: Architecture and Performance.
2-13
Electronic Edition (ACM DL) BibTeX
- Yuetsu Kodama, Hirohumi Sakane, Mitsuhisa Sato, Hayato Yamana, Shuichi Sakai, Yoshinori Yamaguchi:
The EM-X Parallel Computer: Architecture and Basic Performance.
14-23
Electronic Edition (ACM DL) BibTeX
- Steven Cameron Woo, Moriyoshi Ohara, Evan Torrie, Jaswinder Pal Singh, Anoop Gupta:
The SPLASH-2 Programs: Characterization and Methodological Considerations.
24-36
Electronic Edition (ACM DL) BibTeX
Cache Coherence
Interconnect Technology and I/O
- Andreas Nowatzyk, Michael C. Browne, Edmund J. Kelly, Michael Parkin:
S-Connect: From Networks of Workstations to Supercomputer Performance.
71-82
Electronic Edition (ACM DL) BibTeX
- Anujan Varma, Quinn Jacobson:
Destage Algorithms for Disk Arrays with Non-Volatile Caches.
83-95
Electronic Edition (ACM DL) BibTeX
- Gordon Stoll, Bin Wei, Douglas W. Clark, Edward W. Felten, Kai Li, Pat Hanrahan:
Evaluating Multi-Port Frame Buffer Designs for a Mesh-Connected Multicomputer.
96-105
Electronic Edition (ACM DL) BibTeX
- Andreas Nowatzyk, Paul R. Prucnal:
Are Crossbars Really Dead? The Case for Optical Multiprocessor Interconnect Systems.
106-115
Electronic Edition (ACM DL) BibTeX
Instruction Level Parallelism
New Microarchitectures
- Mike Simone, A. Essen, A. Ike, A. Krishnamoorthy, Tak Maruyama, Niteen Patkar, M. Ramaswami, Michael Shebanow, V. Thirumalaiswamy, DeForest Tovey:
Implementation Trade-Offs in Using a Restricted Data Flow Architecture in a High Performance RISC Microprocessor.
151-162
Electronic Edition (ACM DL) BibTeX
- Trung A. Diep, Christopher Nelson, John Paul Shen:
Performance Evaluation of the PowerPC 620 Microarchitecture.
163-175
Electronic Edition (ACM DL) BibTeX
Managing Memory Hierarchies
Interconnection Network Routing
Novel Memory Access Mechanisms
Branch Prediction
System Evaluation
Instruction Fetching
- Thomas M. Conte, Kishore N. Menezes, Patrick M. Mills, Burzin A. Patel:
Optimization of Instruction Fetch Mechanisms for High Issue Rates.
333-344
Electronic Edition (ACM DL) BibTeX
- Richard Uhlig, David Nagle, Trevor N. Mudge, Stuart Sechrest, Joel S. Emer:
Instruction Fetching: Coping with Code Bloat.
345-356
Electronic Edition (ACM DL) BibTeX
- Dennis Lee, Jean-Loup Baer, Brad Calder, Dirk Grunwald:
Instruction Cache Fetch Policies for Speculative Execution.
357-367
Electronic Edition (ACM DL) BibTeX
Caches
Processor Architecture
Copyright © Sat May 16 23:24:57 2009
by Michael Ley (ley@uni-trier.de)
