| 1997 |
|---|
| 6 | | Ashih D. Mehta,
Yao-Ping Chen,
Noel Menezes,
D. F. Wong,
Lawrence T. Pileggi:
Clustering and Load Balancing for Buffered Clock Tree Synthesis.
ICCD 1997: 217-223 |
| 1996 |
|---|
| 5 | EE | Chung-Ping Chen,
Yao-Ping Chen,
D. F. Wong:
Optimal Wire-Sizing Formular Under the Elmore Delay Model.
DAC 1996: 487-490 |
| 1995 |
|---|
| 4 | | Yao-Ping Chen,
D. F. Wong:
A Graph Theoretic Approach to Feed-Through Pin Assignment.
ISCAS 1995: 1687-1690 |
| 1994 |
|---|
| 3 | | Yao-Ping Chen,
D. F. Wong:
On Retiming for FPGA Logic Module Minimization.
ICCD 1994: 394-397 |
| 1993 |
|---|
| 2 | | Yao-Ping Chen,
Ting-Chi Wang,
D. F. Wong:
A Graph Partitioning Problem for Multiple-chip Design.
ISCAS 1993: 1778-1781 |
| 1 | | Yao-Ping Chen,
D. F. Wong:
On optimal approximation of orthogonal polygons.
ISCAS 1993: 2533-2536 |
