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Yao-Ping Chen

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1997
6 Ashih D. Mehta, Yao-Ping Chen, Noel Menezes, D. F. Wong, Lawrence T. Pileggi: Clustering and Load Balancing for Buffered Clock Tree Synthesis. ICCD 1997: 217-223
1996
5EEChung-Ping Chen, Yao-Ping Chen, D. F. Wong: Optimal Wire-Sizing Formular Under the Elmore Delay Model. DAC 1996: 487-490
1995
4 Yao-Ping Chen, D. F. Wong: A Graph Theoretic Approach to Feed-Through Pin Assignment. ISCAS 1995: 1687-1690
1994
3 Yao-Ping Chen, D. F. Wong: On Retiming for FPGA Logic Module Minimization. ICCD 1994: 394-397
1993
2 Yao-Ping Chen, Ting-Chi Wang, D. F. Wong: A Graph Partitioning Problem for Multiple-chip Design. ISCAS 1993: 1778-1781
1 Yao-Ping Chen, D. F. Wong: On optimal approximation of orthogonal polygons. ISCAS 1993: 2533-2536

Coauthor Index

1Charlie Chung-Ping Chen (Chung-Ping Chen) [5]
2Ashih D. Mehta [6]
3Noel Menezes [6]
4Lawrence T. Pileggi (Larry T. Pileggi, Lawrence T. Pillage) [6]
5Ting-Chi Wang [2]
6Martin D. F. Wong (D. F. Wong) [1] [2] [3] [4] [5] [6]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)