2009 |
68 | EE | Mohit Tiwari,
Hassan M. G. Wassel,
Bita Mazloom,
Shashidhar Mysore,
Frederic T. Chong,
Timothy Sherwood:
Complete information flow tracking from the gates up.
ASPLOS 2009: 109-120 |
67 | EE | Nitin Kataria,
Forrest Brewer,
João Pedro Hespanha,
Timothy Sherwood:
Metric Based Multi-Timescale Control for Reducing Power in Embedded Systems.
VLSI Design 2009: 407-412 |
2008 |
66 | EE | Shashidhar Mysore,
Bita Mazloom,
Banit Agrawal,
Timothy Sherwood:
Understanding and visualizing full systems with data flow tomography.
ASPLOS 2008: 211-221 |
65 | EE | Ryan Dixon,
Ömer Egecioglu,
Timothy Sherwood:
Automata-Theoretic Analysis of Bit-Split Languages for Packet Scanning.
CIAA 2008: 141-150 |
64 | EE | Ted Huffmire,
Jonathan Valamehr,
Timothy Sherwood,
Ryan Kastner,
Timothy E. Levin,
Thuy D. Nguyen,
Cynthia E. Irvine:
Trustworthy System Security through 3-D Integrated Hardware.
HOST 2008: 91-92 |
63 | EE | Ryan Dixon,
Timothy Sherwood:
Whiteboards that compute: A workload analysis.
IISWC 2008: 69-78 |
62 | EE | Mohit Tiwari,
Banit Agrawal,
Shashidhar Mysore,
Jonathan Valamehr,
Timothy Sherwood:
A small cache of large ranges: Hardware methods for efficiently searching, storing, and updating big dataflow tags.
MICRO 2008: 94-105 |
61 | EE | Banit Agrawal,
Timothy Sherwood,
Chulho Shin,
Simon Yoon:
Addressing the Challenges of Synchronization/Communication and Debugging Support in Hardware/Software Cosimulation.
VLSI Design 2008: 354-361 |
60 | EE | Shashidhar Mysore,
Banit Agrawal,
Frederic T. Chong,
Timothy Sherwood:
Exploring the Processor and ISA Design for Wireless Sensor Network Applications.
VLSI Design 2008: 59-64 |
59 | EE | Ted Huffmire,
Brett Brotherton,
Nick Callegari,
Jonathan Valamehr,
Jeff White,
Ryan Kastner,
Timothy Sherwood:
Designing secure systems on reconfigurable hardware.
ACM Trans. Design Autom. Electr. Syst. 13(3): (2008) |
58 | EE | Ted Huffmire,
Timothy Sherwood,
Ryan Kastner,
Timothy E. Levin:
Enforcing memory policy specifications in reconfigurable hardware.
Computers & Security 27(5-6): 197-215 (2008) |
57 | EE | Banit Agrawal,
Timothy Sherwood:
Ternary CAM Power and Delay Model: Extensions and Uses.
IEEE Trans. VLSI Syst. 16(5): 554-564 (2008) |
56 | EE | Shashidhar Mysore,
Banit Agrawal,
Rodolfo Neuber,
Timothy Sherwood,
Nisheeth Shrivastava,
Subhash Suri:
Formulating and implementing profiling over adaptive ranges.
TACO 5(1): (2008) |
2007 |
55 | EE | Greg Hoover,
Forrest Brewer,
Timothy Sherwood:
Towards understanding architectural tradeoffs in MEMS closed-loop feedback control.
CASES 2007: 95-102 |
54 | EE | Ted Huffmire,
Brett Brotherton,
Gang Wang,
Timothy Sherwood,
Ryan Kastner,
Timothy E. Levin,
Thuy D. Nguyen,
Cynthia E. Irvine:
Moats and Drawbridges: An Isolation Primitive for Reconfigurable Hardware Based Systems.
IEEE Symposium on Security and Privacy 2007: 281-295 |
53 | EE | Shashidhar Mysore,
Banit Agrawal,
Navin Srivastava,
Sheng-Chih Lin,
Kaustav Banerjee,
Timothy Sherwood:
3D Integration for Introspection.
IEEE Micro 27(1): 77-83 (2007) |
2006 |
52 | EE | Shashidhar Mysore,
Banit Agrawal,
Navin Srivastava,
Sheng-Chih Lin,
Kaustav Banerjee,
Timothy Sherwood:
Introspective 3D chips.
ASPLOS 2006: 264-273 |
51 | EE | Greg Hoover,
Forrest Brewer,
Timothy Sherwood:
Extensible control architectures.
CASES 2006: 323-333 |
50 | EE | Anahita Shayesteh,
Glenn Reinman,
Norman P. Jouppi,
Timothy Sherwood,
Suleyman Sair:
Improving the performance and power efficiency of shared helpers in CMPs.
CASES 2006: 345-356 |
49 | EE | Greg Hoover,
Forrest Brewer,
Timothy Sherwood:
A case study of multi-threading in the embedded space.
CASES 2006: 357-367 |
48 | EE | Shashidhar Mysore,
Banit Agrawal,
Timothy Sherwood,
Nisheeth Shrivastava,
Subhash Suri:
Profiling over Adaptive Ranges.
CGO 2006: 147-158 |
47 | EE | Yan Meng,
Timothy Sherwood,
Ryan Kastner:
Leakage power reduction of embedded memories on FPGAs through location assignment.
DAC 2006: 612-617 |
46 | EE | Gian Luca Loi,
Banit Agrawal,
Navin Srivastava,
Sheng-Chih Lin,
Timothy Sherwood,
Kaustav Banerjee:
A thermally-aware performance analysis of vertically integrated (3-D) processor-memory hierarchy.
DAC 2006: 991-996 |
45 | EE | Ted Huffmire,
Shreyas Prasad,
Timothy Sherwood,
Ryan Kastner:
Policy-Driven Memory Protection for Reconfigurable Hardware.
ESORICS 2006: 461-478 |
44 | EE | Banit Agrawal,
Timothy Sherwood:
Guiding Architectural SRAM Models.
ICCD 2006 |
43 | EE | Banit Agrawal,
Timothy Sherwood:
Modeling TCAM power for next generation network devices.
ISPASS 2006: 120-129 |
42 | EE | Banit Agrawal,
Timothy Sherwood:
Virtually Pipelined Network Memory.
MICRO 2006: 197-207 |
41 | EE | Ted Huffmire,
Timothy Sherwood:
Wavelet-based phase classification.
PACT 2006: 95-104 |
40 | EE | Lin Tan,
Timothy Sherwood:
Architectures for Bit-Split String Scanning in Intrusion Detection.
IEEE Micro 26(1): 110-117 (2006) |
39 | EE | Timothy Sherwood,
Joshua J. Yi:
Guest Editors' Introduction: Computer Architecture Simulation and Modeling.
IEEE Micro 26(4): 5-7 (2006) |
38 | EE | Greg Hamerly,
Erez Perelman,
Jeremy Lau,
Brad Calder,
Timothy Sherwood:
Using Machine Learning to Guide Architecture Simulation.
Journal of Machine Learning Research 7: 343-378 (2006) |
37 | EE | Lin Tan,
Brett Brotherton,
Timothy Sherwood:
Bit-split string-matching engines for intrusion detection and prevention.
TACO 3(1): 3-34 (2006) |
36 | EE | Priya Nagpurkar,
Hussam Mousa,
Chandra Krintz,
Timothy Sherwood:
Efficient remote profiling for resource-constrained devices.
TACO 3(1): 35-66 (2006) |
2005 |
35 | EE | Priya Nagpurkar,
Chandra Krintz,
Timothy Sherwood:
Phase-Aware Remote Profiling.
CGO 2005: 191-202 |
34 | EE | Timothy Sherwood,
Farilee Mintz,
Miroslava Vomela:
Project VIRGO: creation of a surrogate companion for the elderly.
CHI Extended Abstracts 2005: 2104-2108 |
33 | EE | Yan Meng,
Andrew P. Brown,
Ronald A. Iltis,
Timothy Sherwood,
Hua Lee,
Ryan Kastner:
MP core: algorithm and design techniques for efficient channel estimation in wireless applications.
DAC 2005: 297-302 |
32 | | Wenrui Gong,
Yan Meng,
Gang Wang,
Ryan Kastner,
Timothy Sherwood:
Data Partitioning and Optimizations for Reconfigurable Architectures.
ERSA 2005: 239-242 |
31 | EE | Yan Meng,
Timothy Sherwood,
Ryan Kastner:
On the Limits of Leakage Power Reduction in Caches.
HPCA 2005: 154-165 |
30 | EE | Anahita Shayesteh,
Eren Kursun,
Timothy Sherwood,
Suleyman Sair,
Glenn Reinman:
Reducing the Latency and Area Cost of Core Swapping through Shared Helper Engines.
ICCD 2005: 17-23 |
29 | EE | Lin Tan,
Timothy Sherwood:
A High Throughput String Matching Architecture for Intrusion Detection and Prevention.
ISCA 2005: 112-122 |
28 | EE | Jeremy Lau,
Erez Perelman,
Greg Hamerly,
Timothy Sherwood,
Brad Calder:
Motivation for Variable Length Intervals and Hierarchical Phase Behavior.
ISPASS 2005: 135-146 |
27 | EE | Yan Meng,
Wenrui Gong,
Ryan Kastner,
Timothy Sherwood:
Algorithm/Architecture Co-exploration for Designing Energy Efficient Wireless Channel Estimator.
J. Low Power Electronics 1(3): 238-248 (2005) |
26 | EE | Anahita Shayesteh,
Glenn Reinman,
Norman P. Jouppi,
Suleyman Sair,
Timothy Sherwood:
Dynamically configurable shared CMP helper engines for improved performance.
SIGARCH Computer Architecture News 33(4): 70-79 (2005) |
25 | EE | Yan Meng,
Timothy Sherwood,
Ryan Kastner:
Exploring the limits of leakage power reduction in caches.
TACO 2(3): 221-246 (2005) |
2004 |
24 | EE | Timothy Sherwood,
Mark Oskin,
Brad Calder:
Balancing design options with Sherpa.
CASES 2004: 57-68 |
23 | EE | Mathew Mason,
Timothy Sherwood,
Mohammad Rahman,
Miroslava Vomela:
Development of an Olympic audience judging system.
CHI Extended Abstracts 2004: 1626-1630 |
22 | EE | Nathan Tuck,
Timothy Sherwood,
Brad Calder,
George Varghese:
Deterministic Memory-Efficient String Matching Algorithms for Intrusion Detection.
INFOCOM 2004 |
21 | EE | Michael Van Biesbrouck,
Timothy Sherwood,
Brad Calder:
A co-phase matrix to guide simultaneous multithreading simulation.
ISPASS 2004: 45-56 |
20 | EE | Eren Kursun,
Glenn Reinman,
Suleyman Sair,
Anahita Shayesteh,
Timothy Sherwood:
Low-Overhead Core Swapping for Thermal Management.
PACS 2004: 46-60 |
2003 |
19 | EE | Jeremy Lau,
Stefan Schoenmackers,
Timothy Sherwood,
Brad Calder:
Reducing code size with echo instructions.
CASES 2003: 84-94 |
18 | EE | Satish Narayanasamy,
Timothy Sherwood,
Suleyman Sair,
Brad Calder,
George Varghese:
Catching Accurate Profiles in Hardwar.
HPCA 2003: 269-280 |
17 | EE | Timothy Sherwood,
George Varghese,
Brad Calder:
A Pipelined Memory Architecture for High Throughput Network Processors.
ISCA 2003: 288-299 |
16 | EE | Timothy Sherwood,
Suleyman Sair,
Brad Calder:
Phase Tracking and Prediction.
ISCA 2003: 336-347 |
15 | EE | Erez Perelman,
Greg Hamerly,
Michael Van Biesbrouck,
Timothy Sherwood,
Brad Calder:
Using SimPoint for accurate and efficient simulation.
SIGMETRICS 2003: 318-319 |
14 | EE | Timothy Sherwood,
Erez Perelman,
Greg Hamerly,
Suleyman Sair,
Brad Calder:
Discovering and Exploiting Program Phases.
IEEE Micro 23(6): 84-93 (2003) |
13 | EE | Suleyman Sair,
Timothy Sherwood,
Brad Calder:
A Decoupled Predictor-Directed Stream Prefetching Architecture.
IEEE Trans. Computers 52(3): 260-276 (2003) |
2002 |
12 | EE | Timothy Sherwood,
Erez Perelman,
Greg Hamerly,
Brad Calder:
Automatically characterizing large scale program behavior.
ASPLOS 2002: 45-57 |
11 | EE | Suleyman Sair,
Timothy Sherwood,
Brad Calder:
Quantifying Load Stream Behavior.
HPCA 2002: 197- |
2001 |
10 | EE | Timothy Sherwood,
Brad Calder:
Patchable instruction ROM architecture.
CASES 2001: 24-33 |
9 | EE | Timothy Sherwood,
Erez Perelman,
Brad Calder:
Basic Block Distribution Analysis to Find Periodic Behavior and Simulation Points in Applications.
IEEE PACT 2001: 3-14 |
8 | EE | Timothy Sherwood,
Brad Calder:
Automated design of finite state machine predictors for customized processors.
ISCA 2001: 86-97 |
7 | EE | Scott A. Mahlke,
Rajiv A. Ravindran,
Michael S. Schlansker,
Robert Schreiber,
Timothy Sherwood:
Bitwidth cognizant architecture synthesis of custom hardwareaccelerators.
IEEE Trans. on CAD of Integrated Circuits and Systems 20(11): 1355-1371 (2001) |
2000 |
6 | EE | Timothy Sherwood,
Brad Calder:
ToolBlocks: An Infrastructure for the Construction of Memory Hierarchy Analysis Tools (Research Note).
Euro-Par 2000: 70-74 |
5 | EE | Timothy Sherwood,
Brad Calder:
Loop Termination Prediction.
ISHPC 2000: 73-87 |
4 | EE | Timothy Sherwood,
Suleyman Sair,
Brad Calder:
Predictor-directed stream buffers.
MICRO 2000: 42-53 |
1999 |
3 | EE | Mark Oskin,
Frederic T. Chong,
Timothy Sherwood:
ActiveOS: Virtualizing Intelligent Memory.
ICCD 1999: 202- |
2 | EE | Timothy Sherwood,
Brad Calder,
Joel S. Emer:
Reducing cache misses using hardware and software page placement.
International Conference on Supercomputing 1999: 155-164 |
1998 |
1 | EE | Mark Oskin,
Frederic T. Chong,
Timothy Sherwood:
Active Pages: A Computation Model for Intelligent Memory.
ISCA 1998: 192-203 |