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Ravishankar R. Iyer
List of publications from the DBLP Bibliography Server - FAQ
2008 | ||
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43 | EE | Priya Govindarajan, Srihari Makineni, Donald Newell, Ravi R. Iyer, Ram Huggahalli, Amit Kumar: Achieving 10Gbps Network Processing: Are We There Yet?. HiPC 2008: 518-528 |
42 | EE | Padma Apparao, Ravi R. Iyer, Donald Newell: Implications of cache asymmetry on server consolidation performance. IISWC 2008: 24-32 |
41 | EE | Padma Apparao, Ravi R. Iyer, Xiaomin Zhang, Donald Newell, Tom Adelmeyer: Characterization & analysis of a server consolidation benchmark. VEE 2008: 21-30 |
2007 | ||
40 | EE | Omesh Tickoo, Hari Kannan, Vineet Chadha, Ramesh Illikkal, Ravi R. Iyer, Donald Newell: qTLB: Looking Inside the Look-Aside Buffer. HiPC 2007: 107-118 |
39 | EE | Li Zhao, Ravi R. Iyer, Srihari Makineni, Ramesh Illikkal, Jaideep Moses, Donald Newell: Constraint-Aware Large-Scale CMP Cache Design. HiPC 2007: 161-171 |
38 | EE | Li Zhao, Ravi R. Iyer, Ramesh Illikkal, Donald Newell: Exploring DRAM cache architectures for CMP server platforms. ICCD 2007: 55-62 |
37 | EE | Seongbeom Kim, Fang Liu, Yan Solihin, Ravi R. Iyer, Li Zhao, W. Cohen: Accelerating Full-System Simulation through Characterizing and Predicting Operating System Performance. ISPASS 2007: 1-11 |
36 | EE | Wenlong Li, Eric Li, Aamer Jaleel, Jiulong Shan, Yurong Chen, Qigang Wang, Ravi R. Iyer, Ramesh Illikkal, Yimin Zhang, Dong Liu, M. Liao, Wei Wei, Jinhua Du: Understanding the Memory Performance of Data-Mining Workloads on Small, Medium, and Large-Scale CMPs Using Hardware-Software Co-simulation. ISPASS 2007: 35-43 |
35 | EE | Li Zhao, Ravi R. Iyer, Ramesh Illikkal, Jaideep Moses, Srihari Makineni, Donald Newell: CacheScouts: Fine-Grain Monitoring of Shared Caches in CMP Platforms. PACT 2007: 339-352 |
34 | EE | Ravi R. Iyer, Li Zhao, Fei Guo, Ramesh Illikkal, Srihari Makineni, Donald Newell, Yan Solihin, Lisa R. Hsu, Steven K. Reinhardt: QoS policies and architecture for cache/memory in CMP platforms. SIGMETRICS 2007: 25-36 |
33 | EE | Vineet Chadha, Ramesh Illikkal, Ravi R. Iyer, Jaideep Moses, Donald Newell, Renato J. O. Figueiredo: I/O processing in a virtualized platform: a simulation-driven approach. VEE 2007: 116-125 |
32 | EE | Li Zhao, Ravi R. Iyer, Jaideep Moses, Ramesh Illikkal, Srihari Makineni, Donald Newell: Exploring Large-Scale CMP Architectures Using ManySim. IEEE Micro 27(4): 21-33 (2007) |
31 | EE | Li Zhao, Laxmi N. Bhuyan, Ravi R. Iyer, Srihari Makineni, Donald Newell: Hardware Support for Accelerating Data Movement in Server Platform. IEEE Trans. Computers 56(6): 740-753 (2007) |
2006 | ||
30 | EE | Srihari Makineni, Ravishankar R. Iyer, Partha Sarangam, Donald Newell, Li Zhao, Ramesh Illikkal, Jaideep Moses: Receive Side Coalescing for Accelerating TCP/IP Processing. HiPC 2006: 289-300 |
29 | EE | Ravi R. Iyer, Mahesh Bhat, Li Zhao, Ramesh Illikkal, Srihari Makineni, Michael Jones, Kumar Shiv, Donald Newell: Exploring Small-Scale and Large-Scale CMP Architectures for Commercial Java Servers. IISWC 2006: 191-200 |
28 | EE | Padma Apparao, Ravi R. Iyer, Donald Newell: Architectural Characterization of VM Scaling on an SMP Machine. ISPA Workshops 2006: 464-473 |
27 | EE | Keshavan Varadarajan, S. K. Nandy, Vishal Sharda, Amrutur Bharadwaj, Ravi R. Iyer, Srihari Makineni, Donald Newell: Molecular Caches: A caching structure for dynamic creation of application-specific Heterogeneous cache regions. MICRO 2006: 433-442 |
26 | EE | Lisa R. Hsu, Steven K. Reinhardt, Ravishankar R. Iyer, Srihari Makineni: Communist, utilitarian, and capitalist cache policies on CMPs: caches as a shared resource. PACT 2006: 13-22 |
25 | EE | Li Zhao, Yan Luo, Laxmi N. Bhuyan, Ravi R. Iyer: A Network Processor-Based, Content-Aware Switch. IEEE Micro 26(3): 72-84 (2006) |
2005 | ||
24 | EE | Li Zhao, Yan Luo, Laxmi N. Bhuyan, Ravi R. Iyer: SpliceNP: a TCP splicer using a network processor. ANCS 2005: 135-143 |
23 | EE | Li Zhao, Yan Luo, Laxmi N. Bhuyan, Ravishankar R. Iyer: Design and Implementation of a Content-Aware Switch Using a Network Processor. Hot Interconnects 2005: 79-85 |
22 | EE | Li Zhao, Ravi R. Iyer, Srihari Makineni, Laxmi N. Bhuyan, Donald Newell: Hardware Support for Bulk Data Movement in Server Platforms. ICCD 2005: 53-60 |
21 | EE | Ram Huggahalli, Ravi R. Iyer, Scott Tetrick: Direct Cache Access for High Bandwidth Network I/O. ISCA 2005: 50-59 |
20 | EE | Li Zhao, Ravi R. Iyer, Srihari Makineni, Laxmi N. Bhuyan: Anatomy and Performance of SSL Processing. ISPASS 2005: 197-206 |
19 | EE | Ravi R. Iyer, Jack Perdue, Lawrence Rauchwerger, Nancy M. Amato, Laxmi N. Bhuyan: An Experimental Evaluation of the HP V-Class and SGI Origin 2000 Multiprocessors using Microbenchmarks and Scientific Applications. International Journal of Parallel Programming 33(4): 307-350 (2005) |
18 | EE | Lisa R. Hsu, Ravishankar R. Iyer, Srihari Makineni, Steven K. Reinhardt, Donald Newell: Exploring the cache design space for large scale CMPs. SIGARCH Computer Architecture News 33(4): 24-33 (2005) |
2004 | ||
17 | EE | Srihari Makineni, Ravi R. Iyer: Architectural Characterization of TCP/IP Packet Processing on the Pentium M Microprocessor. HPCA 2004: 152-163 |
16 | EE | Padma Apparao, Ravi R. Iyer, Ricardo Morin, Naren Nayak, Mahesh Bhat, David Halliwell, William Steinberg: Architectural Characterization of an XML-Centric Commercial Server Workload. ICPP 2004: 292-300 |
15 | EE | Ravi R. Iyer: CQoS: a framework for enabling QoS in shared caches of CMP platforms. ICS 2004: 257-266 |
14 | EE | Jaideep Moses, Ramesh Illikkal, Ravi R. Iyer, Ram Huggahalli, Donald Newell: ASPEN: Towards Effective Simulation of Threads and Engines in Evolving Platforms. MASCOTS 2004: 51-58 |
13 | EE | Greg J. Regnier, Srihari Makineni, Ramesh Illikkal, Ravi R. Iyer, Dave B. Minturn, Ram Huggahalli, Donald Newell, Linda S. Cline, Annie Foong: TCP Onloading for Data Center Servers. IEEE Computer 37(11): 48-58 (2004) |
12 | EE | Ravi R. Iyer: Characterization and Evaluation of Cache Hierarchies for Web Servers. World Wide Web 7(3): 259-280 (2004) |
2003 | ||
11 | EE | Ravi R. Iyer: On Modeling and Analyzing Cache Hierarchies using CASPER. MASCOTS 2003: 182-187 |
2002 | ||
10 | EE | Rong Yu, Laxmi N. Bhuyan, Ravi R. Iyer: Comparing the Memory System Performance of DSS Workloads on the HP V-Class and SGI Origin 2000. IPDPS 2002 |
9 | EE | Ravishankar R. Iyer, Hu-Jun Wang, Laxmi N. Bhuyan: Design and analysis of static memory management policies for CC-NUMA multiprocessors. Journal of Systems Architecture 48(1-3): 59-80 (2002) |
2001 | ||
8 | Ravi R. Iyer: Exploring the Cache Design Space for Web Servers. IPDPS 2001: 67 | |
2000 | ||
7 | EE | Ravi R. Iyer, Laxmi N. Bhuyan, Ashwini K. Nanda: Using Switch Directories to Speed Up Cache-to-Cache Transfers in CC-NUMA Multiprocessors. IPDPS 2000: 721-728 |
6 | EE | Ravi R. Iyer, Laxmi N. Bhuyan: Design and Evaluation of a Switch Cache Architecture for CC-NUMA Multiprocessors. IEEE Trans. Computers 49(8): 779-797 (2000) |
5 | EE | Laxmi N. Bhuyan, Ravi R. Iyer, Hu-Jun Wang, Akhilesh Kumar: Impact of CC-NUMA Memory Management Policies on the Application Performance of Multistage Switching Networks. IEEE Trans. Parallel Distrib. Syst. 11(3): 230-246 (2000) |
1999 | ||
4 | EE | Ravi R. Iyer, Laxmi N. Bhuyan: Switch Cache: A Framework for Improving the Remote Memory Access Latency of CC-NUMA Multiprocessors. HPCA 1999: 152-160 |
3 | EE | Ravi R. Iyer, Nancy M. Amato, Lawrence Rauchwerger, Laxmi N. Bhuyan: Comparing the memory system performance of the HP V-class and SGI Origin 2000 multiprocessors using microbenchmarks and scientific applications. International Conference on Supercomputing 1999: 339-347 |
1998 | ||
2 | EE | Laxmi N. Bhuyan, Hu-Jun Wang, Ravi R. Iyer, Akhilesh Kumar: Impact of Switch Design on the Application Performance of Cache-Coherent Multiprocessors. IPPS/SPDP 1998: 466-474 |
1997 | ||
1 | EE | Laxmi N. Bhuyan, Ravi R. Iyer, Tahsin Askar, Ashwini K. Nanda, Mohan Kumar: Performance of Multistage Bus Networks for a Distributed Shared Memory Multiprocessor. IEEE Trans. Parallel Distrib. Syst. 8(1): 82-95 (1997) |