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Mamoru Sugie

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2004
12EEYutaka Yoshimura, Toshiaki Tarui, Toru Shonai, Shun Kawabe, Mamoru Sugie: Server-allocation policy for improving response to web-access peaks. Systems and Computers in Japan 35(5): 55-66 (2004)
2003
11 Mineyoshi Masuda, Yutaka Yoshimura, Toshiaki Tarui, Toru Shonai, Mamoru Sugie: VPDC: Virtual Private Data Center: A Flexible and Rapid Workloadmanagement System. Integrated Network Management 2003: 473-476
2000
10EEAki W. Tomita, Naoki Watanabe, Yoshifumi Takamoto, Shigekazu Inohara, Frederico B. Maciel, Hiroaki Odawara, Mamoru Sugie: A Scalable, Cost-Effective, and Flexible Disk System Using High-Performance Embedded-Processors. ICPP 2000: 317-326
1994
9 Toshiaki Tarui, Machiko Asaie, Noriyasu Ido, Takayuki Nakagawa, Mamoru Sugie: Evaluation of the Cluster Structure on the PIM/C Parallel Interface Machine. ICPP 1994: 309-313
8EEMarius V. A. Hâncu, Kazuhiko Iwasaki, Yuji Sato, Mamoru Sugie: A Concurrent Test Architecture for Massively Parallel Computers and Its Error Detection Capability. IEEE Trans. Parallel Distrib. Syst. 5(11): 1169-1184 (1994)
1992
7 Takayuki Nakagawa, Noriyasu Ido, Toshiaki Tarui, Machiko Asaie, Mamoru Sugie: Hardware Implementation of Dynamic Load Balancing in the Parallel Inference Machine PIM/c. FGCS 1992: 723-730
6EEToshiaki Tarui, Takayuki Nakagawa, Noriyasu Ido, Machiko Asaie, Mamoru Sugie: Evaluation of the lock mechanism in a snooping cache. ICS 1992: 53-62
5 Marius V. A. Hâncu, Kazuhiko Iwasaki, Yuji Sato, Mamoru Sugie: Experimental results on the error detection capability of a concurrent test architecture for massively-parallel computers. Parallel Computing 18(10): 1079-1103 (1992)
1991
4 Marius V. A. Hâncu, Kazuhiko Iwasaki, Yuji Sato, Mamoru Sugie: A Concurrent Test Architecture for Massively-Parallel Computers and its Error Detection Capability. ITC 1991: 758-767
1988
3 Mamoru Sugie, M. Yoneyama, Noriyasu Ido, Toshiaki Tarui: Load-Dispatching Strategy on Parallel Inference Machines. FGCS 1988: 987-993
1985
2 Mamoru Sugie, M. Yoneyama, T. Sakabe, M. Iwasaki, S. Yoshizumi, Moritoshi Aso, Hajime Shimizu, Rikio Onai: Hardware Simulator of Reduction-Based Parallel Inference Machine PIM-R. LP 1985: 13-24
1980
1 Yuzo Kita, Noboru Yamaguchi, Mamoru Sugie, Shigeru Yoshizawa: The Development of a Bubble Memory Controller for Low-Cost File Use. IEEE Trans. Computers 29(2): 89-96 (1980)

Coauthor Index

1Machiko Asaie [6] [7] [9]
2Moritoshi Aso [2]
3Marius V. A. Hâncu [4] [5] [8]
4Noriyasu Ido [3] [6] [7] [9]
5Shigekazu Inohara [10]
6Kazuhiko Iwasaki [4] [5] [8]
7M. Iwasaki [2]
8Shun Kawabe [12]
9Yuzo Kita [1]
10Frederico B. Maciel [10]
11Mineyoshi Masuda [11]
12Takayuki Nakagawa [6] [7] [9]
13Hiroaki Odawara [10]
14Rikio Onai [2]
15T. Sakabe [2]
16Yuji Sato [4] [5] [8]
17Hajime Shimizu [2]
18Toru Shonai [11] [12]
19Yoshifumi Takamoto [10]
20Toshiaki Tarui [3] [6] [7] [9] [11] [12]
21Aki W. Tomita [10]
22Naoki Watanabe [10]
23Noboru Yamaguchi [1]
24M. Yoneyama [2] [3]
25Yutaka Yoshimura [11] [12]
26Shigeru Yoshizawa [1]
27S. Yoshizumi [2]

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Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)