2008 |
7 | EE | Toshiro Tsukada:
Special Section on Analog Circuit Techniques and Related Topics.
IEICE Transactions 91-A(2): 441-442 (2008) |
2007 |
6 | EE | Hao San,
Yoshitaka Jingu,
Hiroki Wada,
Hiroyuki Hagiwara,
Akira Hayakawa,
Haruo Kobayashi,
Tatsuji Matsuura,
Kouichi Yahagi,
Junya Kudoh,
Hideo Nakane,
Masao Hotta,
Toshiro Tsukada,
Koichiro Mashiko,
Atsushi Wada:
A Second-Order Multibit Complex Bandpass DeltaSigmaAD Modulator with I, Q Dynamic Matching and DWA Algorithm.
IEICE Transactions 90-C(6): 1181-1188 (2007) |
2006 |
5 | EE | Hao San,
Akira Hayakawa,
Yoshitaka Jingu,
Hiroki Wada,
Hiroyuki Hagiwara,
Kazuyuki Kobayashi,
Haruo Kobayashi,
Tatsuji Matsuura,
Kouichi Yahagi,
Junya Kudoh,
Hideo Nakane,
Masao Hotta,
Toshiro Tsukada,
Koichiro Mashiko,
Atsushi Wada:
Complex Bandpass DeltaSigmaAD Modulator Architecture without I, Q-Path Crossing Layout.
IEICE Transactions 89-A(4): 908-915 (2006) |
4 | EE | Masafumi Uemori,
Haruo Kobayashi,
Tomonari Ichikawa,
Atsushi Wada,
Koichiro Mashiko,
Toshiro Tsukada,
Masao Hotta:
High-Speed Continuous-Time Subsampling Bandpass DeltaSigmaAD Modulator Architecture Employing Radio Frequency DAC.
IEICE Transactions 89-A(4): 916-923 (2006) |
3 | EE | Koichiro Ishibashi,
Tetsuya Fujimoto,
Takahiro Yamashita,
Hiroyuki Okada,
Yukio Arima,
Yasuyuki Hashimoto,
Kohji Sakata,
Isao Minematsu,
Yasuo Itoh,
Haruki Toda,
Motoi Ichihashi,
Yoshihide Komatsu,
Masato Hagiwara,
Toshiro Tsukada:
Low-Voltage and Low-Power Logic, Memory, and Analog Circuit Techniques for SoCs Using 90 nm Technology and Beyond.
IEICE Transactions 89-C(3): 250-262 (2006) |
1998 |
2 | | Seiji Funaba,
Akihiro Kitagawa,
Toshiro Tsukada,
Goichi Yokomizo:
A Fast and Accurate Method of Redesigning Analog Subcircuits for Technology Scaling.
ASP-DAC 1998: 489-494 |
1980 |
1 | | Tsuneo Funabashi,
Katsuaki Takagi,
Toshiro Tsukada,
Hideo Nakamura,
Michio Hara:
An NMOS Microcomputer Peripheral Interface Unit Incorporating an Analog-to-Digital Converter.
IEEE Trans. Computers 29(2): 102-107 (1980) |