2006 |
10 | EE | Kara E. Bliley,
Daniel J. Schwab,
David R. Holmes III,
Paul H. Kane,
James A. Levine,
Erik S. Daniel,
Barry K. Gilbert:
Design of a Compact System Using a MEMS Accelerometer to Measure Body Posture and Ambulation.
CBMS 2006: 335-340 |
2002 |
9 | EE | Steven M. Currie,
Paul R. Schumacher,
Barry K. Gilbert,
Earl E. Swartzlander Jr.,
Barbara A. Randall:
Implementation of a Single Chip, Pipelined, Complex, One-Dimensional Fast FourierTransform in 0.25 mu m BulkCMOS.
ASAP 2002: 335-343 |
1989 |
8 | EE | Guang-Wen Pan,
Kenneth S. Olson,
Barry K. Gilbert:
Improved algorithmic methods for the prediction of wavefront propagation behavior in multiconductor transmission lines for high frequency digital signal processors.
IEEE Trans. on CAD of Integrated Circuits and Systems 8(6): 608-621 (1989) |
1982 |
7 | | Earl E. Swartzlander Jr.,
Barry K. Gilbert:
Supersystems: Technology and Architecture.
IEEE Trans. Computers 31(5): 399-409 (1982) |
1981 |
6 | | Barry K. Gilbert,
Rodney D. Beistad,
Loren M. Krueger:
A Hierarchical Network of Processors for computed Tomography Computation on Large Data Bases.
ICDCS 1981: 423-431 |
1980 |
5 | EE | Richard A. Robb,
Barry K. Gilbert:
Description and evaluation of a system for high-speed, three-dimensional computed tomography of the body: the dynamic spatial reconstructor.
AFIPS National Computer Conference 1980: 427-436 |
4 | | Earl E. Swartzlander Jr.,
Barry K. Gilbert:
Arithmetic for Ultra-High-Speed Tomography.
IEEE Trans. Computers 29(5): 341-353 (1980) |
1978 |
3 | | Earl E. Swartzlander Jr.,
Barry K. Gilbert,
Irving S. Reed:
Inner Product Computers.
IEEE Trans. Computers 27(1): 21-31 (1978) |
1976 |
2 | | Barry K. Gilbert,
Martin T. Storma,
Carl E. James,
Leon W. Hobrock,
Edward S. Yang,
Keith C. Ballard,
Earl H. Wood:
A Real-Time Hardware System for Digital Processing of Wide-Band Video Images.
IEEE Trans. Computers 25(11): 1089-1100 (1976) |
1 | | Barry K. Gilbert,
Martin T. Storma,
Keith C. Ballard,
Leon W. Hobrock,
Carl E. James,
Earl H. Wood:
A Programmable Dynamic Memory Allocation System for Input/Output of Digital Data into Standard Computer Memories at 40 Megasamples/s.
IEEE Trans. Computers 25(11): 1101-1109 (1976) |