2007 |
55 | EE | Masanori Hashimoto,
Takahito Ijichi,
Shingo Takahashi,
Shuji Tsukiyama,
Isao Shirakawa:
Transistor Sizing of LCD Driver Circuit for Technology Migration.
IEICE Transactions 90-A(12): 2712-2717 (2007) |
2006 |
54 | EE | Shingo Takahashi,
Shuji Tsukiyama,
Masanori Hashimoto,
Isao Shirakawa:
A Sampling Switch Design Procedure for Active Matrix Liquid Crystal Displays.
IEICE Transactions 89-A(12): 3538-3545 (2006) |
53 | EE | Gen Fujita,
Takaaki Imanaka,
Hyunh Van Nhat,
Takao Onoye,
Isao Shirakawa:
Real-Time Human Object Extraction Method for Mobile Systems Based on Color Space Segmentation.
IEICE Transactions 89-A(4): 941-949 (2006) |
2005 |
52 | EE | Yoshihiro Uchida,
Sadahiro Tani,
Masanori Hashimoto,
Shuji Tsukiyama,
Isao Shirakawa:
Interconnect capacitance extraction for system LCD circuits.
ACM Great Lakes Symposium on VLSI 2005: 160-163 |
51 | EE | Tomoya Matsumura,
Nobuyuki Iwanaga,
Takao Onoye,
Wataru Kobayashi,
Isao Shirakawa,
Itthichai Arungsrisangchai:
3D sound movement system for embedded applications.
ISCAS (5) 2005: 5345-5348 |
50 | EE | Yukio Mitsuyama,
Motoki Kimura,
Takao Onoye,
Isao Shirakawa:
Architecture of IEEE802.11i Cipher Algorithms for Embedded Systems.
IEICE Transactions 88-A(4): 899-906 (2005) |
49 | EE | Atsushi Kosaka,
Hiroyuki Okuhata,
Takao Onoye,
Isao Shirakawa:
Design of Ogg Vorbis Decoder System for Embedded Platform.
IEICE Transactions 88-A(8): 2124-2130 (2005) |
2004 |
48 | EE | Atsushi Kosaka,
Satoshi Yamaguchi,
Hiroyuki Okuhata,
Takao Onoye,
Isao Shirakawa:
SoC design of Ogg Vorbis decoder using embedded processor.
Conf. Computing Frontiers 2004: 481-487 |
2003 |
47 | | Kenji Hontani,
Takaaki Imanaka,
Gen Fujita,
Takao Onoye,
Isao Shirakawa:
Real-time face object extraction for video phone.
ICIP (3) 2003: 873-876 |
46 | EE | S. Komata,
A. Pal,
Noriaki Sakamoto,
Wataru Kobayashi,
Takao Onoye,
Isao Shirakawa:
Interactive interface of realtime 3D sound movement for embedded applications.
ISCAS (2) 2003: 520-523 |
45 | EE | Noriaki Sakamoto,
Wataru Kobayashi,
Takao Onoye,
Isao Shirakawa:
Single DSP Implementation of Realtime 3D Sound Synthesis Algorithm.
Journal of Circuits, Systems, and Computers 12(1): 55-74 (2003) |
2002 |
44 | EE | Kenji Hontani,
Takaaki Imanaka,
Gen Fujita,
Takao Onoye,
Isao Shirakawa:
Realtime face object extraction algorithm for video phone.
APCCAS (1) 2002: 35-38 |
43 | EE | Nobuyuki Iwanaga,
Wataru Kobayashi,
Kazuhiko Furuya,
Mamoru Sakamoto,
Takao Onoye,
Isao Shirakawa:
Embedded implementation of acoustic field enhancement for stereo headphones.
APCCAS (1) 2002: 51-54 |
42 | EE | Sadahiro Tani,
Yoshihiro Uchida,
Makoto Furuie,
Shuji Tsukiyama,
BuYeol Lee,
S. Nishi,
Y. Kubota,
Isao Shirakawa,
S. Imai:
Parasitic capacitance modeling for multilevel interconnects.
APCCAS (1) 2002: 59-64 |
41 | EE | Katsuya Nakagawa,
Masaru Kawakita,
Koji Sato,
Mitsuru Minakuchi,
Osamu Tsumori,
Keitaro Hanada,
Toru Chiba,
Isao Shirakawa:
OCEAN: Object Communication Environment for Arbitrary Network.
ICDCS Workshops 2002: 162-168 |
40 | EE | Yoshihiro Ohtani,
N. Kawahara,
T. Tomaru,
K. Maruyama,
K. Onoye,
Isao Shirakawa,
Toru Chiba:
Error correction block based ARQ protocol for wireless digital video transmission.
ISCAS (1) 2002: 605-608 |
39 | EE | Yoshihiro Uchida,
M. Ise,
Takao Onoye,
Isao Shirakawa,
Itthichai Arungsrisangchai:
VLSI architecture of digital matched filter and prime interleaver for W-CDMA.
ISCAS (3) 2002: 269-272 |
38 | | T. Kaya,
Isao Shirakawa,
Ryusuke Miyamoto,
Takao Onoye:
Design of Embedded System for Video Coding with Logic-Enhanced DRAM and Configurable Process.
MTDT 2002 |
2001 |
37 | EE | Yukio Mitsuyama,
Zaldy Andales,
Takao Onoye,
Isao Shirakawa:
A dynamically reconfigurable hardware-based cipher chip.
ASP-DAC 2001: 11-12 |
36 | EE | Roberto Y. Omaki,
Yu Dong,
Morgan Hirosuke Miki,
Makoto Furuie,
Daisuke Taki,
Masaya Tarui,
Gen Fujita,
Takao Onoye,
Isao Shirakawa:
Realtime wavelet video coder based on reduced memory accessing.
ASP-DAC 2001: 15-16 |
35 | EE | Morgan Hirosuke Miki,
Mamoru Sakamoto,
Shingo Miyamoto,
Yoshinori Takeuchi,
Toyohiko Yoshida,
Isao Shirakawa:
Evaluation of processor code efficiency for embedded systems.
ICS 2001: 229-235 |
34 | EE | Yukio Mitsuyama,
Zaldy Andales,
Takao Onoye,
Isao Shirakawa:
VLSI architecture of dynamically reconfigurable hardware-based cipher.
ISCAS (4) 2001: 734-737 |
33 | | Morgan Hirosuke Miki,
Motoki Kimura,
Takao Onoye,
Isao Shirakawa:
High Performance Java Hardware Engine and Software Kernel for Embedded Systems.
VLSI-SOC 2001: 109-120 |
2000 |
32 | EE | Makoto Furuie,
Bao-Yu Song,
Yukihiro Yoshida,
Takao Onoye,
Isao Shirakawa:
Layout generation of array cell for NMOS 4-phase dynamic logic (short paper).
ASP-DAC 2000: 529-532 |
31 | | Yu Dong,
Roberto Y. Omaki,
Takao Onoye,
Isao Shirakawa:
VLSI Implementation of a Reduced Memory Bandwidth Realtime EZW Video Coder.
ICIP 2000 |
1999 |
30 | EE | Koji Asari,
Yukio Mitsuyama,
Takao Onoye,
Isao Shirakawa,
Hiroshige Hirano,
Toshiyuki Honda,
Tatsuo Otsuki,
Takaaki Baba,
Teresa H. Y. Meng:
FeRAM Circuit Technology for System on a Chip.
Evolvable Hardware 1999: 193- |
29 | EE | H. Fujishima,
Y. Takemoto,
T. Yoneda,
Takao Onoye,
Isao Shirakawa:
Hybrid media-processor core for natural and synthetic video decoding.
ISCAS (4) 1999: 275-278 |
28 | EE | Morgan Hirosuke Miki,
Daisuke Taki,
Gen Fujita,
Takao Onoye,
Isao Shirakawa,
T. Fujiwara,
T. Kasami:
Recursive maximum likelihood decoder for high-speed satellite communication.
ISCAS (4) 1999: 572-575 |
27 | | Kenji Matsumura,
Gen Fujita,
T. Masaki,
Isao Shirakawa,
Hiroshi Inada:
A wireless data processing system constructed of SAW-devices and its applications to medical cares.
NSIP 1999: 803-805 |
1998 |
26 | | Takao Onoye,
Gen Fujita,
Hiroyuki Okuhata,
Morgan Hirosuke Miki,
Isao Shirakawa:
Low-Power Implementation of H.324 Audiovisual Codec Dedicated to Mobile Computing.
ASP-DAC 1998: 589-594 |
25 | EE | Akira Nagao,
Takashi Kambe,
Isao Shirakawa:
A layout approach to monolithic microwave IC.
ISPD 1998: 65-72 |
24 | EE | Akira Nagao,
Isao Shirakawa,
Takashi Kambe:
A layout approach to monolithic microwave IC.
IEEE Trans. on CAD of Integrated Circuits and Systems 17(12): 1262-1272 (1998) |
1997 |
23 | EE | Hiroshi Uno,
Keiji Kumatani,
Hiroyuki Okuhata,
Isao Shirakawa,
Toru Chiba:
Low power architecture for high speed infrared wireless communication system.
ISLPED 1997: 255-258 |
22 | EE | Yukihiro Yoshida,
Bao-Yu Song,
Hiroyuki Okuhata,
Takao Onoye,
Isao Shirakawa:
An object code compression approach to embedded processors.
ISLPED 1997: 265-268 |
21 | EE | Morgan Hirosuke Miki,
Gen Fujita,
Takao Onoye,
Isao Shirakawa:
Low-power H.263 video CoDec dedicated to mobile computing.
ISLPED 1997: 80-83 |
20 | EE | Hiroshi Uno,
Keiji Kumatani,
Hiroyuki Okuhata,
Isao Shirakawa,
Toru Chiba:
ASK digital demodulation scheme for noise immune infrared data communication.
Wireless Networks 3(2): 121-129 (1997) |
1996 |
19 | EE | Yuji Shigehiro,
Takashi Nagata,
Isao Shirakawa,
Itthichai Arungsrisangchai,
Hiromitsu Takahashi:
Automatic layout recycling based on layout description and linear programming.
IEEE Trans. on CAD of Integrated Circuits and Systems 15(8): 959-967 (1996) |
1995 |
18 | | Isao Shirakawa:
Proceedings of the 1995 Conference on Asia Pacific Design Automation, Makuhari, Massa, Chiba, Japan, August 29 - September 1, 1995
ACM 1995 |
17 | EE | Keisuke Okada,
Shun Morikawa,
Isao Shirakawa,
Sumitaka Takeuchi:
A design of high-performance multiplier for digital video transmission.
ASP-DAC 1995 |
16 | EE | Akira Nagao,
Chiyoshi Yoshioka,
Takashi Kambe,
Isao Shirakawa:
A layout approach to Monolithic Microwave IC.
ASP-DAC 1995 |
15 | EE | Hiroshi Uno,
Toru Chiba,
Keiji Kumatani,
Isao Shirakawa:
Synthesis and simulation of digital demodulator for infrared data communication.
ASP-DAC 1995 |
14 | | Akihisa Yamada,
Satoru Nakamura,
Nagisa Ishiura,
Isao Shirakawa,
Takashi Kambe:
Optimal Scheduling for Conditional Recource Sharing.
ISCAS 1995: 2297-2300 |
1994 |
13 | | Masahiko Toyonaga,
Shih-Tsung Yang,
Toshiro Akino,
Isao Shirakawa:
A New Approach of Fractional-Dimension Based Module Clustering for VLSI Layout.
ISCAS 1994: 185-188 |
12 | | Takayuki Sagishima,
Kozo Kimura,
Hiroaki Hirata,
Tokuzo Kiyohara,
Shigeo Asahara,
Takao Onoye,
Isao Shirakawa:
Multi-Threaded Processor for Image Generation.
ISCAS 1994: 231-234 |
1993 |
11 | | Yuji Shigehiro,
Takashi Nagata,
Isao Shirakawa,
Takashi Kambe:
Optimal layout recycling based on graph theoretic linear programming approach.
VLSI 1993: 25-34 |
1991 |
10 | | Katsunori Tani,
Shuji Tsukiyama,
Shoji Shinoda,
Isao Shirakawa:
On area-efficient drawings of rectangular duals for VLSI floor-plan.
Math. Program. 52: 29-43 (1991) |
1983 |
9 | | Hitoshi Nishimura,
Hiroshi Ohno,
Toru Kawata,
Isao Shirakawa,
Koichi Omura:
LINKS-1: A Parallel Pipelined Multimicrocomputer System for Image Creation
ISCA 1983: 387-394 |
8 | EE | Shuji Tsukiyama,
Ernest S. Kuh,
Isao Shirakawa:
On the Layering Problem of Multilayer PWB Wiring.
IEEE Trans. on CAD of Integrated Circuits and Systems 2(1): 30-38 (1983) |
7 | EE | Isao Shirakawa,
Shin Futagami:
A Rerouting Scheme for Single-Layer Printed Wiring Boards.
IEEE Trans. on CAD of Integrated Circuits and Systems 2(4): 267-271 (1983) |
6 | EE | Shuji Tsukiyama,
Ikuo Harada,
Masahiro Fukui,
Isao Shirakawa:
A New Global Router for Gate Array LSIsi.
IEEE Trans. on CAD of Integrated Circuits and Systems 2(4): 313-321 (1983) |
1981 |
5 | | Isao Shirakawa,
Noboru Okuda,
Takashi Harada,
Sadahiro Tani,
Hiroshi Ozaki:
A Layout System for the Random Logic Portion of an MOS LSI Chip.
IEEE Trans. Computers 30(8): 572-581 (1981) |
1980 |
4 | | Shuji Tsukiyama,
Ernest S. Kuh,
Isao Shirakawa:
On the layering problem of multilayer PWB wiring.
Graph Theory and Algorithms 1980: 20-37 |
3 | | Ikuo Nishioka,
Takuji Kurimoto,
Seiji Yamamoto,
Toru Chiba,
Isao Shirakawa,
Hiroshi Ozaki:
An Approach to Gate Assignment and Module Placement for Printed Wiring Boards.
IEEE Trans. Computers 29(8): 681-688 (1980) |
2 | EE | Shuji Tsukiyama,
Isao Shirakawa,
Hiroshi Ozaki,
Hiromu Ariyoshi:
An Algorithm to Enumerate All Cutsets of a Graph in Linear Time per Cutset.
J. ACM 27(4): 619-632 (1980) |
1977 |
1 | | Shuji Tsukiyama,
Mikio Ide,
Hiromu Ariyoshi,
Isao Shirakawa:
A New Algorithm for Generating All the Maximal Independent Sets.
SIAM J. Comput. 6(3): 505-517 (1977) |