| |
| 1995 | ||
|---|---|---|
| 6 | S. M. GadelRab, James A. Barby, Savvas G. Chamberlain: An Architecture for Integrated Reliability Simulators Using Analog Hardware Description Languages. ISCAS 1995: 897-900 | |
| 1992 | ||
| 5 | EE | John R. F. McMacken, Savvas G. Chamberlain: A numerical model for two-dimensional transient simulation of amorphous silicon thin-film transistors. IEEE Trans. on CAD of Integrated Circuits and Systems 11(5): 629-637 (1992) |
| 1991 | ||
| 4 | EE | Michael J. Van der Tol, Savvas G. Chamberlain: Buried-channel MOSFET model for SPICE. IEEE Trans. on CAD of Integrated Circuits and Systems 10(8): 1015-1035 (1991) |
| 1989 | ||
| 3 | EE | John R. F. McMacken, Savvas G. Chamberlain: CHORD: a modular semiconductor device simulation development tool incorporating external network models. IEEE Trans. on CAD of Integrated Circuits and Systems 8(8): 826-836 (1989) |
| 1984 | ||
| 2 | EE | Constantine N. Anagnostopoulos, Savvas G. Chamberlain: Foreword. IEEE Trans. on CAD of Integrated Circuits and Systems 3(1): 1-2 (1984) |
| 1980 | ||
| 1 | Robert J. Inkol, Savvas G. Chamberlain: Design and Realization of a Two-Level 64K Byte CCD Memory System for Microcomputer Applications. IEEE Trans. Computers 29(2): 195-199 (1980) | |
| 1 | Constantine N. Anagnostopoulos | [2] |
| 2 | James A. Barby | [6] |
| 3 | S. M. GadelRab | [6] |
| 4 | Robert J. Inkol | [1] |
| 5 | John R. F. McMacken | [3] [5] |
| 6 | Michael J. Van der Tol | [4] |